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GA50JT17-CAL Datasheet(PDF) 10 Page - GeneSiC Semiconductor, Inc. |
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GA50JT17-CAL Datasheet(HTML) 10 Page - GeneSiC Semiconductor, Inc. |
10 / 12 page Die Datasheet GA50JT17-CAL Feb 2016 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 10 of 11 Section VI: Mechanical Parameters Die Dimensions 4.35 x 4.35 mm2 171 x 171 mil2 Die Area total / active 18.92/16.56 mm2 29330/25677 mil 2 Die Thickness 360 µm 14 mil Wafer Size 100 mm 3937 mil Flat Position 0 deg 0 deg Die Frontside Passivation Polyimide Gate/Source Pad Metallization 4000 nm Al Bottom Drain Pad Metallization 400 nm Ni + 200 nm Au Die Attach Electrically conductive glue or solder Wire Bond Al ≤ 12 mil (Source) Al ≤ 5 mil (Gate) Reject ink dot size Φ ≥ 0.3 mm Recommended storage environment Store in original container, in dry nitrogen, < 6 months at an ambient temperature of 23 °C Section VII: Chip Dimensions mm mil DIE A 4.35 171 B 4.35 171 SOURCE WIREBONDABLE C 3.30 130 D 1.75 69 E 0.24 9 GATE WIREBONDABLE F 0.46 18 G 0.57 22 A C F E D B G D |
Similar Part No. - GA50JT17-CAL_16 |
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Similar Description - GA50JT17-CAL_16 |
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