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NDM2Z-50HT-A-ZZZ Datasheet(PDF) 6 Page - CUI INC |
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NDM2Z-50HT-A-ZZZ Datasheet(HTML) 6 Page - CUI INC |
6 / 32 page cui.com date 12/21/2015 │ page 6 of 32 CUI Inc │ SERIES: NDM2Z-50 │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER PRODUCT ELECTRICAL SPECIFICATION, HORIZONTAL (CONTINUED) Notes: 1: See section I2C/SMBus Setup and Hold Times – Definitions. 2: Monitorable over PMBus Interface. 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. 4: T sw is the switching period. 5: Within +/-3% of VO 6: See section Soft-start Power Up. 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth. 8: See section Over Temperature Protection (OTP). 9: See section External Capacitors. 10: See section Initialization Procedure. 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise. 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors. 13: Time for reaching 100% of nominal Vout. 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus. 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations. 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms. 17: For steady state operation above 1.05 x 3.3 V, please contact your local CUI sales representative. 18: A minimum load current is not required if Low Power mode is used (monitoring disabled). 19: See sections Dynamic Loop Compensation and Power Good. For more information, please visit the product page. |
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