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IS24C256-3PI Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS24C256-3PI Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 12 page Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 ADVANCEDINFORMATION Rev. 00B 03/11/03 IS24C256 ISSI® Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. 262,144-bit 2-WIRE SERIAL CMOS EEPROM FEATURES • Organization: – 32K-bit x 8-bit • 64-Byte Page Write Buffer • Two-Wire Serial Interface – Bi-directional data transfer protocol • Low Power CMOS Technology – Active Current less than 3 mA (5V) – Standby Current less than 6 µA (5V) – Standby Current less than 2 µA (2.5V) • Wide Voltage Operation – IS24C256-2: Vcc = 1.8V to 5.5V – IS24C256-3: Vcc = 2.5V to 5.5V • 1 MHz (I2C TM Protocol) Compatibility ADVANCED INFORMATION MARCH 2003 • Hardware Data Protection – Write Protect pin • Sequential Read Feature • Filtered Inputs for Noise Suppression • Self time Write cycle with auto clear – 5 ms @ 5.0V • High Reliability – Endurance: 100,000 Cycles – Data Retention: 40 Years • Commercial and Industrial temperature ranges • 8-pin PDIP, 8-pin SOIC, and 14-pin TSSOP DESCRIPTION The IS24C256 is an electrically erasable PROM device that uses the standard 2-wire interface for communications. The IS24C256 contains a memory array of 256K-bits (32,768 x 8), and is further subdivided into 512 pages of 64 bytes each for Page- Write mode. This EEPROM is offered in wide operating voltages of 1.8V to 5.5V (IS24C256-2) and 2.5V to 5.5V (IS24C256-3) to be compatible with most application voltages. ISSI designed the IS24C256 to be a low-cost and low-power 2-wire EEPROM solution. The devices are packaged in 8-pin PDIP, 8-pin SOIC, and 14-pin TSSOP. The IS24C256 maintains compatibility with the popular 2-wire bus protocol, so it is easy to design into applications implementing this bus type. The simple bus consists of the Serial Clock wire (SCL) and the Serial Data wire (SDA). Using the bus, a Master device such as a microcontroller is usually connected to one or more Slave devices such as the IS24C256. The bit stream over the SDA line includes a series of bytes, which identifies a particular Slave device, an instruction, an address within that Slave device, and a series of data, if appropriate. The IS24C256 has a Write Protect pin (WP) to allow blocking of any write instruction transmitted over the bus. |
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