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HY29LV320TT-70 Datasheet(PDF) 7 Page - Hynix Semiconductor

Part # HY29LV320TT-70
Description  32 Mbit (2M x 16) Low Voltage Flash Memory
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY29LV320TT-70 Datasheet(HTML) 7 Page - Hynix Semiconductor

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7
r1.3/May 02
HY29LV320
Table 1. HY29LV320T (Top Boot Block) Memory Array Organization
-
t
c
e
S
r
o
e
z
i
S
)
d
r
o
W
K
(
s
s
e
r
d
d
A
r
o
t
c
e
S
1
e
g
n
a
R
s
s
e
r
d
d
A
3
,
2
]
0
2
[
A
]
9
1
[
A
]
8
1
[
A
]
7
1
[
A
]
6
1
[
A
]
5
1
[
A
]
4
1
[
A
]
3
1
[
A
]
2
1
[
A
0
S2
3
000000
X
X
X
F
F
F
7
0
0
x
0
-
0
0
0
0
0
0
x
0
1
S2
3
00000
1
X
X
X
F
F
F
F
0
0
x
0
-
0
0
0
8
0
0
x
0
2
S2
3
0000
1
0
X
X
X
F
F
F
7
1
0
x
0
-
0
0
0
0
1
0
x
0
3
S2
3
0000
11
X
X
X
F
F
F
F
1
0
x
0
-
0
0
0
8
1
0
x
0
4
S2
3
000
1
0
0
X
X
X
F
F
F
7
2
0
x
0
-
0
0
0
0
2
0
x
0
5
S2
3
000
1
0
1
X
X
X
F
F
F
F
2
0
x
0
-
0
0
0
8
2
0
x
0
6
S2
3
000
11
0
X
X
X
F
F
F
7
3
0
x
0
-
0
0
0
0
3
0
x
0
7
S2
3
000
111
X
X
X
F
F
F
F
3
0
x
0
-
0
0
0
8
3
0
x
0
8
S2
3
0
0
1
000
X
X
X
F
F
F
7
4
0
x
0
-
0
0
0
0
4
0
x
0
9
S2
3
0
0
1
0
0
1
XXX
F
F
F
F
4
0
x
0
-
0
0
0
8
4
0
x
0
0
1
S2
3
0
01
01
0
X
X
X
F
F
F
7
5
0
x
0
-
0
0
0
0
5
0
x
0
1
1
S2
3
0
01
01
1
X
X
X
F
F
F
F
5
0
x
0
-
0
0
0
8
5
0
x
0
2
1
S2
3
0
0
1
1
0
0
XXX
F
F
F
7
6
0
x
0
-
0
0
0
0
6
0
x
0
3
1
S2
3
0
0
1
1
0
1
XXX
F
F
F
F
6
0
x
0
-
0
0
0
8
6
0
x
0
4
1
S2
3
0
0
111
0
X
X
X
F
F
F
7
7
0
x
0
-
0
0
0
0
7
0
x
0
5
1
S2
3
0
0
1111
X
X
X
F
F
F
F
7
0
x
0
-
0
0
0
8
7
0
x
0
6
1
S2
3
0
1
0000
X
X
X
F
F
F
7
8
0
x
0
-
0
0
0
0
8
0
x
0
7
1
S2
3
0
1
000
1
X
X
X
F
F
F
F
8
0
x
0
-
0
0
0
8
8
0
x
0
8
1
S2
3
0
1
0
0
1
0
XXX
F
F
F
7
9
0
x
0
-
0
0
0
0
9
0
x
0
9
1
S2
3
0
1
0
0
1
1
XXX
F
F
F
F
9
0
x
0
-
0
0
0
8
9
0
x
0
0
2
S2
3
0
10
10
0
X
X
X
F
F
F
7
A
0
x
0
-
0
0
0
0
A
0
x
0
1
2
S2
3
0
10
10
1
X
X
X
F
F
F
F
A
0
x
0
-
0
0
0
8
A
0
x
0
2
2
S2
3
0
1
0
1
1
0
XXX
F
F
F
7
B
0
x
0
-
0
0
0
0
B
0
x
0
3
2
S2
3
0
1
0
111
X
X
X
F
F
F
F
B
0
x
0
-
0
0
0
8
B
0
x
0
4
2
S2
3
0
11
000
X
X
X
F
F
F
7
C
0
x
0
-
0
0
0
0
C
0
x
0
5
2
S2
3
0
11
00
1
X
X
X
F
F
F
F
C
0
x
0
-
0
0
0
8
C
0
x
0
6
2
S2
3
0
1
1
0
1
0
XXX
F
F
F
7
D
0
x
0
-
0
0
0
0
D
0
x
0
7
2
S2
3
0
1
1
0
1
1
XXX
F
F
F
F
D
0
x
0
-
0
0
0
8
D
0
x
0
8
2
S2
3
0
111
00
X
X
X
F
F
F
7
E
0
x
0
-
0
0
0
0
E
0
x
0
9
2
S2
3
0
111
0
1
X
X
X
F
F
F
F
E
0
x
0
-
0
0
0
8
E
0
x
0
0
3
S2
3
0
1111
0
X
X
X
F
F
F
7
F
0
x
0
-
0
0
0
0
F
0
x
0
1
3
S2
3
0
11111
X
X
X
F
F
F
F
F
0
x
0
-
0
0
0
8
F
0
x
0
-
2
3
S
2
6
S
2
31
=
]
0
2
[
A
t
p
e
c
x
e
0
3
S
-
0
S
s
a
e
m
a
S
0
3
S
-
0
S
s
a
e
m
a
S
1
=
D
S
M
t
p
e
c
x
e
3
6
S6
1
111111
0
X
X
F
F
F
B
F
1
x
0
-
0
0
0
8
F
1
x
0
4
6
S
4
1111111
00
F
F
F
C
F
1
x
0
-
0
0
0
C
F
1
x
0
5
6
S
4
1111111
0
1
F
F
F
D
F
1
x
0
-
0
0
0
D
F
1
x
0
6
6
S
8
11111111
X
F
F
F
F
F
1
x
0
-
0
0
0
E
F
1
x
0
Notes:
1. ‘X’ indicates don’t care.
2. ‘0xN. . . N’ indicates an address in hexadecimal notation.
3. The address range is A[20:0].


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