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OPA334AIDBVT Datasheet(PDF) 7 Page - Burr-Brown (TI) |
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OPA334AIDBVT Datasheet(HTML) 7 Page - Burr-Brown (TI) |
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7 / 18 page  7 www.ti.com OPA334, OPA2334, OPA335, OPA2335 SBOS245D TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +5V, RL = 10kΩ connected to VS /2, and VOUT = VS /2, unless otherwise noted. APPLICATIONS INFORMATION The OPA334 and OPA335 series op amps are unity-gain stable and free from unexpected output phase reversal. They use auto-zeroing techniques to provide low offset voltage and very low drift over time and temperature. Good layout practice mandates use of a 0.1 µF capacitor placed closely across the supply pins. For lowest offset voltage and precision performance, circuit layout and mechanical conditions should be optimized. Avoid temperature gradients that create thermoelectric (Seebeck) effects in thermocouple junctions formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring that they are equal on both input terminals. • Use low thermoelectric-coefficient connections (avoid dis- similar metals). • Thermally isolate components from power supplies or other heat-sources. • Shield op amp and input circuitry from air currents, such as cooling fans. Following these guidelines will reduce the likelihood of junc- tions being at different temperatures, which can cause ther- moelectric voltages of 0.1 µV/°C or higher, depending on materials used. OPERATING VOLTAGE The OPA334 and OPA335 series op amps operate over a power-supply range of +2.7V to +5.5V ( ±1.35V to ±2.75V). Supply voltages higher than 7V (absolute maximum) can permanently damage the amplifier. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. OPA334 ENABLE FUNCTION The enable/shutdown digital input is referenced to the V– supply voltage of the amp. A logic high enables the op amp. A valid logic high is defined as > 75% of the total supply voltage. The valid logic high signal can be up to 5.5V above the negative supply, independent of the positive supply voltage. A valid logic low is defined as < 0.8V above the V– supply pin. If dual or split power supplies are used, be sure that logic input signals are properly referred to the negative supply voltage. The Enable pin must be connected to a valid high or low voltage, or driven, not left open circuit. The logic input is a high-impedance CMOS input, with sepa- rate logic inputs provided on the dual version. For battery- operated applications, this feature can be used to greatly reduce the average current and extend battery life. The enable time is 150 µs, which includes one full auto-zero cycle required by the amplifier to return to VOS accuracy. Prior to this time, the amplifier functions properly, but with unspecified offset voltage. Disable time is 1 µs. When disabled, the output assumes a high-impedance state. This allows the OPA334 to be oper- ated as a gated amplifier, or to have the output multiplexed onto a common analog output bus. INPUT VOLTAGE The input common-mode range extends from (V–) – 0.1V to (V+) – 1.5V. For normal operation, the inputs must be limited to this range. The common-mode rejection ratio is only valid within the valid input common-mode range. A lower supply voltage results in lower input common-mode range; there- fore, attention to these values must be given when selecting the input bias voltage. For example, when operating on a single 3V power supply, common-mode range is from 0.1V below ground to half the power-supply voltage. COMMON-MODE RANGE vs SUPPLY VOLTAGE 2.7 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 –0.5 3.7 3.2 5.2 5.5 Supply Voltage (V) 4.7 4.2 Minimum Common-Mode Maximum Common-Mode SETTLING TIME vs CLOSED-LOOP GAIN 1 100 10 1 10 Gain (V/V) 100 0.1% 0.01% Unity-gain requires one complete Auto-Zero Cycle—see text. |
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