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BR24L02FVM-W Datasheet(PDF) 5 Page - Rohm |
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BR24L02FVM-W Datasheet(HTML) 5 Page - Rohm |
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5 / 26 page  BR24L02-W / BR24L02F-W / BR24L02FJ-W / Memory ICs BR24L02FV-W / BR24L02FVM-W 5/25 AC operating characteristics (Unless otherwise specified Ta= −40 to 85°C, VCC=1.8 to 5.5V) Parameter Symbol Fast-mode 2.5V ≤ Vcc ≤ 5.5V Standard-mode 1.8V ≤ Vcc ≤ 5.5V Unit fSCL kHz tHIGH Noise spike width (SDA and SCL) tWR tl ms Data clock "HIGH" period Clock frequency µs Data clock "LOW" period tLOW µs SDA and SCL rise time ∗1 ∗1 ∗1 Not 100% tested. tR µs SDA and SCL fall time tF µs Start condition hold time tHD:STA µs Start condition setup time tSU:STA µs Input data hold time tHD:DAT ns Input data setup time tSU:DAT ns Output data delay time Output data hold time tPD µs Stop condition setup time tDH µs Bus free time tSU:STO µs tBUF Min. − 0.6 − − 1.2 − − 0.6 0.6 0 100 0.1 0.1 0.6 1.2 Typ. − − − − − − − − − − − − − − − Max. 400 − 5 − 0.3 0.3 − − − − 0.9 − − − Min. − 4.0 − − 4.7 − − 4.0 4.7 0 250 0.2 0.2 4.7 4.7 Typ. − − − − − − − − − − − − − − − Max. 100 − tSU:WP WP high period µs 0.1 −− 0.1 −− 5 0.1 − 1.0 0.3 − − − − 3.5 WP setup time tHD:WP ns µs 0 − − 0.1 0 − − − − −µs Write cycle time WP hold time tHIGH:WP µs 1.0 −− 1.0 −− |
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Similar Description - BR24L02FVM-W |
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