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C8051F002 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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C8051F002 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 170 page Page 4 CYGNAL Integrated Products, Inc. 2001 4.2001; Rev. 1.3 C8051F000/1/2/5/6/7 C8051F010/1/2/5/6/7 PRELIMINARY 10.4. INTERRUPT HANDLER......................................................................................................................76 Table 10.4. Interrupt Summary ........................................................................................................................77 Figure 10.9. IE: Interrupt Enable .....................................................................................................................78 Figure 10.10. IP: Interrupt Priority ..................................................................................................................79 Figure 10.11. EIE1: Extended Interrupt Enable 1 ............................................................................................80 Figure 10.12. EIE2: Extended Interrupt Enable 2 ............................................................................................81 Figure 10.13. EIP1: Extended Interrupt Priority 1 ...........................................................................................82 Figure 10.14. EIP2: Extended Interrupt Priority 2 ...........................................................................................83 10.5. Power Management Modes ....................................................................................................................84 Figure 10.15. PCON: Power Control Register .................................................................................................85 11. FLASH MEMORY............................................................................................................ 86 11.1. Programming The Flash Memory...........................................................................................................86 Table 11.1. FLASH Memory Electrical Characteristics...................................................................................86 11.2. Non-volatile Data Storage......................................................................................................................87 11.3. Security Options.....................................................................................................................................87 Figure 11.1. PSCTL: Program Store RW Control............................................................................................87 Figure 11.2. Flash Program Memory Security Bytes ........................................................................................88 Figure 11.3. FLACL: Flash Access Limit (C8051F005/06/07/15/16/17 only) ................................................89 Figure 11.4. FLSCL: Flash Memory Timing Prescaler ....................................................................................90 12. EXTERNAL RAM (C8051F005/06/07/15/16/17) ............................................................ 91 Figure 12.1. EMI0CN: External Memory Interface Control ............................................................................91 13. RESET SOURCES ............................................................................................................ 92 Figure 13.1. Reset Sources Diagram ................................................................................................................92 13.1. Power-on Reset ......................................................................................................................................93 13.2. Software Forced Reset ...........................................................................................................................93 Figure 13.2. VDD Monitor Timing Diagram ...................................................................................................93 13.3. Power-fail Reset .....................................................................................................................................93 13.4. External Reset ........................................................................................................................................94 13.5. Missing Clock Detector Reset................................................................................................................94 13.6. Comparator 0 Reset................................................................................................................................94 13.7. External CNVSTR Pin Reset .................................................................................................................94 13.8. Watchdog Timer Reset...........................................................................................................................94 Figure 13.3. WDTCN: Watchdog Timer Control Register ..............................................................................95 Figure 13.4. RSTSRC: Reset Source Register .................................................................................................96 Table 13.1. Reset Electrical Characteristics.....................................................................................................97 14. OSCILLATOR................................................................................................................... 98 Figure 14.1. Oscillator Diagram.......................................................................................................................98 Figure 14.2. OSCICN: Internal Oscillator Control Register ............................................................................99 Table 14.1. Internal Oscillator Electrical Characteristics.................................................................................99 Figure 14.3. OSCXCN: External Oscillator Control Register........................................................................100 14.1. External Crystal Example.....................................................................................................................101 14.2. External RC Example...........................................................................................................................101 14.3. External Capacitor Example.................................................................................................................101 15. PORT INPUT/OUTPUT ................................................................................................. 102 15.1. Priority Cross Bar Decoder ..................................................................................................................102 15.2. Port I/O Initialization ...........................................................................................................................102 Figure 15.1. Port I/O Functional Block Diagram ...........................................................................................103 Figure 15.2. Port I/O Cell Block Diagram .....................................................................................................103 Table 15.1. Crossbar Priority Decode............................................................................................................104 Figure 15.3. XBR0: Port I/O CrossBar Register 0 .........................................................................................105 Figure 15.4. XBR1: Port I/O CrossBar Register 1 .........................................................................................106 Figure 15.5. XBR2: Port I/O CrossBar Register 2 .........................................................................................107 15.3. General Purpose Port I/O .....................................................................................................................108 15.4. Configuring Ports Which are not Pinned Out.......................................................................................108 |
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