August 18, 2003
Document #: 38-12010 CY Rev. *B CMS Rev. 3.22
11
Figure 1: Block Diagram ............................................................................................................................13
Figure 2: CY8C25122 ................................................................................................................................15
Figure 3: CY8C26233 ................................................................................................................................15
Figure 4: 26443 PDIP/SOIC/SSOP ...........................................................................................................16
Figure 5: 26643 TQFP ...............................................................................................................................17
Figure 6: 26643 PDIP/SSOP .....................................................................................................................18
Figure 7: General Purpose I/O Pins ..........................................................................................................30
Figure 8: External Crystal Oscillator Connections .....................................................................................37
Figure 9: PSoC MCU Clock Tree of Signals ..............................................................................................39
Figure 10: Interrupts Overview ..................................................................................................................43
Figure 11: GPIO Interrupt Enable Diagram ...............................................................................................47
Figure 12: Digital Basic and Digital Communications PSoC Blocks ..........................................................49
Figure 13: Polynomial LFSR ......................................................................................................................65
Figure 14: Polynomial PRS .......................................................................................................................65
Figure 15: SPI Waveforms ........................................................................................................................68
Figure 16: Array of Analog PSoC Blocks ...................................................................................................72
Figure 17: Analog Reference Control Schematic ......................................................................................73
Figure 18: NMux Connections ...................................................................................................................78
Figure 19: PMux Connections ...................................................................................................................79
Figure 20: RBotMux Connections ..............................................................................................................79
Figure 21: Analog Continuous Time PSoC Blocks ....................................................................................81
Figure 22: Analog Switch Cap Type A PSoC Blocks .................................................................................86
Figure 23: AMux Connections ...................................................................................................................87
Figure 24: CMux Connections ...................................................................................................................87
Figure 25: BMuxSCA/SCB Connections ...................................................................................................88
Figure 26: Analog Switch Cap Type B PSoC Blocks .................................................................................95
Figure 27: Analog Input Muxing ...............................................................................................................103
Figure 28: Analog Output Buffers ............................................................................................................105
Figure 29: Multiply/Accumulate Block Diagram .......................................................................................110
Figure 30: Decimator Coefficients ...........................................................................................................112
Figure 31: Execution Reset .....................................................................................................................115
Figure 32: Three Sleep States .................................................................................................................117
Figure 33: Switch Mode Pump ................................................................................................................119
Figure 34: Programming Wave Forms ....................................................................................................124
Figure 35: PSoC Designer Functional Flow ............................................................................................125
Figure 36: CY8C25xxx/CY8C26xxx Voltage Frequency Graph ..............................................................127
Figure 37: 44-Lead Thin Plastic Quad Flat Pack A44 .............................................................................143
Figure 38: 20-Pin Shrunk Small Outline Package O20 ...........................................................................144
Figure 39: 28-Lead (210-Mil) Shrunk Small Outline Package O28 .........................................................145
Figure 40: 48-Lead Shrunk Small Outline Package O48 .........................................................................145
Figure 41: 20-Lead (300-Mil) Molded DIP P5 ..........................................................................................146
Figure 42: 28-Lead (300-Mil) Molded DIP P21 ........................................................................................146
Figure 43: 48-Lead (600-Mil) Molded DIP P25 ........................................................................................146
Figure 44: 20-Lead (300-Mil) Molded SOIC S5 .......................................................................................147
Figure 45: 28-Lead (300-Mil) Molded SOIC S21 .....................................................................................147
List of Figures