Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
8
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
Table 46: Interrupt Vector Register ............................................................................................................46
Table 47: Digital Basic Type A/ Communications Type A Block xx Function Register...............................50
Table 48: Digital Basic Type A / Communications Type A Block xx Input Register ...................................51
Table 49: Digital Function Data Input Definitions .......................................................................................52
Table 50: Digital Basic Type A / Communications Type A Block xx Output Register.................................53
Table 51: Digital Function Outputs .............................................................................................................54
Table 52: Digital Basic Type A / Communications Type A Block xx Data Register 0,1,2...........................54
Table 53: R/W Variations per User Module Selection ................................................................................55
Table 54: Digital Basic Type A / Communications Type A Block xx Control Register 0.............................55
Table 55: Digital Basic Type A/Communications Type A Block xx Control Register 0...............................56
Table 56: Digital Communications Type A Block xx Control Register 0... ..................................................57
Table 57: Digital Communications Type A Block xx Control Register 0... ..................................................58
Table 58: Digital Communications Type A Block xx Control Register 0... ..................................................59
Table 59: Global Input Assignments...........................................................................................................60
Table 60: Global Output Assignments........................................................................................................60
Table 61: Analog System Clocking Signals................................................................................................72
Table 62: Analog Reference Control Register............................................................................................73
Table 63: Analog Column Clock Select Register........................................................................................74
Table 64: Analog Clock Select Register .....................................................................................................75
Table 65: Analog Continuous Time Block xx Control 0 Register................................................................80
Table 66: Analog Continuous Time Block xx Control 1 Register................................................................81
Table 67: Analog Continuous Time Type A Block xx Control 2 Register ...................................................82
Table 68: Analog Switch Cap Type A Block xx Control 0 Register ............................................................86
Table 69: Analog Switch Cap Type A Block xx Control 1 Register ............................................................88
Table 70: Analog Switch Cap Type A Block xx Control 2 Register ............................................................90
Table 71: Analog Switch Cap Type A Block xx Control 3 Register ............................................................91
Table 72: Analog Switch Cap Type B Block xx Control 0 Register ............................................................93
Table 73: Analog Switch Cap Type B Block xx Control 1 Register ............................................................95
Table 74: Analog Switch Cap Type B Block xx Control 2 Register ............................................................97
Table 75: Analog Switch Cap Type B Block xx Control 3 Register ............................................................98
Table 76: Analog Comparator Control Register .........................................................................................99
Table 77: Analog Frequency Relationships..............................................................................................100
Table 78: Analog Synchronization Control Register.................................................................................100
Table 79: Analog Input Select Register ....................................................................................................102
Table 80: Analog Output Buffer Control Register .....................................................................................104
Table 81: Analog Modulator Control Register ..........................................................................................105
Table 82: Multiply Input X Register...........................................................................................................108
Table 83: Multiply Input Y Register...........................................................................................................108
Table 84: Multiply Result High Register ...................................................................................................109
Table 85: Multiply Result Low Register ....................................................................................................109
Table 86: Accumulator Result 1 / Multiply/Accumulator Input X Register ................................................109
Table 87: Accumulator Result 0 / Multiply/Accumulator Input Y Register ................................................109
Table 88: Accumulator Result 3 / Multiply/Accumulator Clear 0 Register ................................................110
Table 89: Accumulator Result 2 / Multiply/Accumulator Clear 1 Register ................................................110
Table 90: Decimator/Incremental Control Register ..................................................................................111
Table 91: Decimator Data High Register..................................................................................................111
Table 92: Decimator Data Low Register...................................................................................................111
Table 93: Processor Status and Control Register ....................................................................................112
Table 94: Reset WDT Register.................................................................................................................114
Table 95: Voltage Monitor Control Register .............................................................................................116
Table 96: Bandgap Trim Register.............................................................................................................118
Table 97: CY8C25122, CY8C26233, CY8C26443, CY8C26643 (256 Bytes of SRAM) ..........................119
Table 98: Table Read for Supervisory Call Functions ..............................................................................120
Table 99: Flash Program Memory Protection...........................................................................................120
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