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COP87L88GGN-XE Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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COP87L88GGN-XE Datasheet(HTML) 7 Page - National Semiconductor (TI) |
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7 / 42 page  Pin Descriptions VCC and GND are the power supply pins All VCC and GND pins must be connected CKI is the clock input This can come from an RC generat- ed oscillator or a crystal oscillator (in conjunction with CKO) See Oscillator Description section RESET is the master reset input See Reset Description section The device contains three bidirectional 8-bit IO ports (C G and L) where each individual bit may be independently con- figured as an input (Schmitt Trigger inputs on ports L and G) output or TRI-STATE under program control Three data memory address locations are allocated for each of these IO ports Each IO port has two associated 8-bit memory mapped registers the CONFIGURATION register and the output DATA register A memory mapped address is also reserved for the input pins of each IO port (See the memo- ry map for the various addresses associated with the IO ports) Figure 4 shows the IO port configurations The DATA and CONFIGURATION registers allow for each port bit to be individually configured under software control as shown below CONFIGURATION DATA Port Set-Up Register Register 0 0 Hi-Z Input (TRI-STATE Output) 0 1 Input with Weak Pull-Up 1 0 Push-Pull Zero Output 1 1 Push-Pull One Output PORT L is an 8-bit IO port All L-pins have Schmitt triggers on the inputs The Port L supports Multi-Input Wake Up on all eight pins L1 is used for the UART external clock L2 and L3 are used for the UART transmit and receive L4 and L5 are used for the timer input functions T2A and T2B L6 and L7 are used for the timer input functions T3A and T3B The Port L has the following alternate features L0 MIWU L1 MIWU or CKX L2 MIWU or TDX L3 MIWU or RDX L4 MIWU or T2A L5 MIWU or T2B L6 MIWU or T3A L7 MIWU or T3B Port G is an 8-bit port with 5 IO pins (G0 G2 – G5) an input pin (G6) and a dedicated output pin (G7) Pins G0 and G2 – G6 all have Schmitt Triggers on their inputs Pin G1 serves as the dedicated WDOUT WATCHDOG output while pin G7 is either input or output depending on the oscillator mask option selected With the crystal oscillator option selected G7 serves as the dedicated output pin for the CKO clock output With the single-pin RC oscillator mask option se- lected G7 serves as a general purpose input pin but is also used to bring the device out of HALT mode with a low to high transition on G7 There are two registers associated with the G Port a data register and a configuration register Therefore each of the 5 IO bits (G0 G2 – G5) can be indi- vidually configured under software control Since G6 is an input only pin and G7 is the dedicated CKO clock output pin (crystal clock option) or general purpose input (RC clock option) the associated bits in the data and configuration registers for G6 and G7 are used for special purpose functions as outlined on the next page Reading the G6 and G7 data bits will return zeros TLDD12532 – 5 FIGURE 4 IO Port Configurations http www nationalcom 7 |
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