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CY62256
Document #: 38-05248 Rev. *C
Page 6 of 12
Notes:
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high impedance if OE = VIH.
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
Switching Waveforms (continued)
50%
50%
DATA VALID
tRC
tACE
tDOE
tLZOE
tLZCE
tPU
DATA OUT
HIGH IMPEDANCE
IMPEDANCE
ICC
ISB
tHZOE
tHZCE
tPD
OE
CE
HIGH
VCC
SUPPLY
CURRENT
Read Cycle No. 2 [13, 14]
tHD
tSD
tPWE
tSA
tHA
tAW
tWC
DATA I/O
ADDRESS
CE
WE
OE
tHZOE
DATAIN VALID
NOTE
Write Cycle No. 1 (WE Controlled)
[10, 15, 16]
17
tWC
tAW
tSA
tHA
tHD
tSD
tSCE
WE
DATA I/O
ADDRESS
CE
DATAIN VALID
Write Cycle No. 2 (CE Controlled)
[10, 15, 16]