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IR2110(-1-2)(S)PbF/IR2113(-1-2)(S)PbF

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the

recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical

ratings at other bias conditions are shown in figures 36 and 37.

DT97-3 for more details).

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured

under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.

Symbol

Definition

Min.

Max.

Units

High side floating supply voltage (IR2110)

-0.3

525

(IR2113)

-0.3

625

High side floating supply offset voltage

High side floating output voltage

Low side fixed supply voltage

-0.3

25

Low side output voltage

-0.3

Logic supply voltage

-0.3

Logic supply offset voltage

Logic input voltage (HIN, LIN & SD)

Allowable offset supply voltage transient (figure 2)

—

50

V/ns

(14 lead DIP)

—

1.6

(16 lead SOIC)

—

1.25

Thermal resistance, junction to ambient

(14 lead DIP)

—

75

(16 lead SOIC)

—

100

Junction temperature

—

150

Storage temperature

-55

150

Lead temperature (soldering, 10 seconds)

—

300

°C/W

W

V

°C

Symbol

Definition

Min.

Max.

Units

High side floating supply absolute voltage

High side floating supply offset voltage

(IR2110)

Note 1

500

(IR2113)

Note 1

600

High side floating output voltage

Low side fixed supply voltage

10

20

Low side output voltage

0

Logic supply voltage

Logic supply offset voltage

-5 (Note 2)

5

Logic input voltage (HIN, LIN & SD)

Ambient temperature

-40

125

°C

V