7

LTC1844 Series

1844ia

APPLICATIO S I FOR ATIO

output current change of 1mA to 100mA is – 4mV typical

(5V/1.25V)(– 4mV) = –16mV

Because the ADJ pin is relatively high impedance (depend-

ing on the resistor divider used), stray capacitance at this

pin can introduce significant phase shift in the error

amplifier loop. The PCB layout should be designed to

absolutely minimize the capacitance seen at the ADJ pin.

To ensure stability over all operating conditions when

utilizing large divider resistors, it may be necessary to use

a small ceramic feedforward capacitor (~1000pF) in par-

an added bonus, this capacitor will improve transient

response.

Bypass Capacitance and Low Noise Performance

A bypass capacitor can optionally be connected from the

BYP pin to ground to lower output voltage noise. A good

quality low leakage capacitor is recommended. This ca-

pacitor will bypass the input of the error amplifier, provid-

ing a low frequency noise pole. The noise pole provided by

this bypass capacitor will lower the output voltage noise to

as low as 30

Initial regulator power-up time is inversely proportional to

the size of the bypass capacitor, slowing to 10ms with a

0.1

µF capacitor and 10µF output capacitor. However, the

LTC1844 does not discharge the bypass capacitor when

put into shutdown and thus the shutdown exit delay can be

much shorter (

≈70µs) than initial power-up time if the

shutdown duration is brief (<10ms). The maximum shut-

down duration required to allow fast shutdown exit is

determined by the capacitor leakage current, thus a low

leakage bypass capacitor is recommended.

Output Capacitance and Transient Response

The LTC1844 regulators are designed to be stable with a

wide range of output capacitors. The ESR of the output

capacitor affects stability, most notably with small capaci-

tors. A minimum output capacitor of 1

µF with an ESR of

0.3

Ω or less is recommended to ensure stability. The

LTC1844 is a micropower device and output transient

response will be a function of output capacitance. Larger

values of output capacitance decrease the peak deviations

and provide improved transient response for larger load

current changes. Note that bypass capacitors used to

decouple individual components powered by the LTC1844

will increase the effective output capacitor value. The

shaded region of Figure 3 defines the region over which

the LTC1844 regulators are stable. The maximum ESR

allowed is 0.3

Ω. High ESR tantalum and electrolytic ca-

pacitors may be used, but a low ESR ceramic capacitor

must be in parallel at the output. There is no minimum ESR

requirement.

Extra consideration must be given to the use of ceramic

capacitors. Ceramic capacitors are manufactured with a

variety of dielectrics, each with different behavior across

Figure 3. Stability

OUTPUT CAPACITANCE (

µF)

0.33

1

3.3

10

33

0.20

0.25

STABLE REGION

0.30

100

1844 F03

0.15

0.10

0

0.05

0.40

0.35