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IS24C08-3GI Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc |
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IS24C08-3GI Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc |
3 / 13 page Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 3 Rev. D 06/25/02 IS24C01 IS24C02 IS24C04 IS24C08 IS24C16 ISSI® PIN DESCRIPTIONS A0-A2 Address Inputs SDA Serial Address/Data I/O SCL Serial Clock Input WP Write Protect Input Vcc Power Supply GND Ground SCL This input clock pin is used to synchronize the data transfer to and from the device. SDA TheSDAisaBi-directionalpinusedtotransferaddressesanddata intoandoutofthedevice. TheSDApinisanopendrainoutputand can be wire-Ored with other open drain or open collector outputs. The SDA bus requires a pullup resistor to Vcc. A0, A1, A2 TheA0,A1andA2arethedeviceaddressinputs.TheIS24C01and IS24C02 use the A0, A1, and A2 for hardware addressing and a total of 8 devices may be used on a single bus system. PIN CONFIGURATION 8-Pin DIP and SOIC 8 Pin TSSOP (1K, 2K, 4K and 8K) 8-Pin MSOP (1K, 2K) 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA The IS24C04 uses A1 and A2 pins for hardwire addressing and a total of four devices may be addressed on a single bus system. The A0 pin is not used by IS24C04. This pin can be left floating or tied to GND or Vcc. The IS24C08 only use A2 input for hardwire addressing and a total of two devices may be addressed on a single bus system. The A0 and A1 pins are not used by IS24C08. They may be left floating or tied to either GND or Vcc. These pins are not used by IS24C16. A0 and A1 may be left floating or tied to either GND or Vcc. A2 should be tied to either GND or Vcc. WP WP is the Write Protect pin. On the 24C01, 24C02, IS24C04 and 24C08, if the WP pin is tied to VCC the entire array becomes Write Protected (Read only). On the 24C16, if the WP pin is tied to Vcc the upper half array becomes Write Protected (Read only). When WP is tied to GND or left floating normal read/write operations are allowed to the device. |
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