Part Name
         Description
NCP1030

 Low Power PWM Controller with On-Chip Power Switch and Startup Circuits for 48 V Telecom Systems ( 18 Page)


ONSEMI
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NCP1030, NCP1031
http://onsemi.com
6
DC ELECTRICAL CHARACTERISTICS (VDRAIN = 48 V, VCC = 12 V, CT = 560 pF, VUV = 3 V, VOV = 2 V, VFB = 2.3 V,
VCOMP = 2.5 V, TJ = −40°C to 125°C, typical values shown are for TJ = 25°C unless otherwise noted.) (Note 2)
Characteristics
Symbol
Min
Typ
Max
Unit
OSCILLATOR
Frequency (CT = 560 pF, Note 3)
TJ = 25°C
TJ = −40°C to 125°C
fOSC1
275
260
300
325
325
kHz
Frequency (CT = 100 pF)
fOSC2
800
kHz
Charge Current (VCT = 3.25 V)
ICT(C)
215
mA
Discharge Current (VCT = 3.25 V)
ICT(D)
645
mA
Oscillator Ramp
Peak
Valley
Vrpk
Vrvly
3.5
3.0
V
PWM COMPARATOR
Maximum Duty Cycle
DCMAX
70
75
80
%
POWER SWITCH CIRCUIT
Power Switch Circuit On−State Resistance (ID = 100 mA)
NCP1030
TJ = 25°C
TJ = 125°C
NCP1031
TJ = 25°C
TJ = 125°C
RDS(on)
4.1
6.0
2.1
3.5
7.0
12
3.0
6.0
W
Power Switch Circuit and Startup Circuit Breakdown Voltage
(ID = 100 mA, TJ = 25°C)
V(BR)DS
200
V
Power Switch Circuit and Startup Circuit Off−State Leakage Current
(VDRAIN = 200 V, VUV = 2.0 V)
TJ = 25°C
TJ = −40 to 125°C
IDS(off)
13
25
50
mA
Switching Characteristics (VDS = 48 V, RL = 100 W)
Rise Time
Fall Time
tr
tf
22
24
ns
CURRENT LIMIT AND OVER TEMPERATURE PROTECTION
Current Limit Threshold (TJ = 25°C)
NCP1030 (di/dt = 0.5 A/
ms)
NCP1031 (di/dt = 1.0 A/
ms)
ILIM
350
700
515
1050
680
1360
mA
Propagation Delay, Current Limit Threshold to Power Switch Circuit Output
(Leading Edge Blanking plus Current Limit Delay)
tPLH
100
ns
Thermal Protection (Note 4)
Shutdown Threshold (TJ Increasing)
Hysteresis
TSHDN
THYS
125
150
45
°C
TOTAL DEVICE
Supply Current After UV Turn−On
Power Switch Enabled
Power Switch Disabled
Non−Fault condition (VFB = 2.7 V)
Fault Condition (VFB = 2.7 V, VUV = 2.0 V)
ICC1
ICC2
ICC3
2.0
3.0
1.5
0.65
4.0
2.0
1.2
mA
2. Production testing for NCP1030DMR2 is performed at 25
°C only; limits at −40°C and 125°C are guaranteed by design.
3. Oscillator frequency can be externally synchronized to the maximum frequency of the device.
4. Guaranteed by design only.
1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18 



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