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UMFT240XA-01 Datasheet(PDF) 7 Page - Future Technology Devices International Ltd.

Part # UMFT240XA-01
Description  UMFT201XE USB to I2C Development Module
Download  23 Pages
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Manufacturer  FTDI [Future Technology Devices International Ltd.]
Direct Link  http://www.ftdichip.com
Logo FTDI - Future Technology Devices International Ltd.

UMFT240XA-01 Datasheet(HTML) 7 Page - Future Technology Devices International Ltd.

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Copyright © 2016 Future Technology Devices International Limited
7
UMFT201XE Datasheet
Version 1.2
Doc ument Reference N o.: FT _000650 C learance N o.: FT DI#
292
4.3
CBUS Signals Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
www.ftdichip.com. The default configuration is described in Section 9.
CBUS Signal Option
Available On CBUS
Pin
Description
Tristate
CBUS0 - CBUS5
IO Pad is tri-stated
DRIVE_1
CBUS0 - CBUS5
Output a constant 1
DRIVE_0
CBUS0 - CBUS5
Output a constant 0
PWREN#
CBUS0-CBUS5
Output is low after the device has been configured by USB, then
high during USB suspend mode. This output can be used to control
power to external logic P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no
internal pull-up; this is specially designed to aid battery charging
applications. UMFT231XE connects all CBUS and DBUS signals an
on-board 47K pull-up.
TXLED#
CBUS0 - CBUS5
Transmit data LED drive – pulses low when transmitting data via
USB.
RXLED#
CBUS0 - CBUS5
Receive data LED drive – pulses low when receiving data via USB.
TX&RXLED#
CBUS0 - CBUS5
LED drive – pulses low when transmitting or receiving data via USB.
SLEEP#
CBUS0 - CBUS5
Goes low during USB suspend mode. Typically used to power down
an external TTL to RS232 level converter IC in USB to RS232
converter designs.
CLK24MHz
CBUS0 - CBUS5
24 MHz Clock output.**
CLK12MHz
CBUS0 - CBUS5
12 MHz Clock output.**
CLK6MHz
CBUS0 - CBUS5
6 MHz Clock output.**
GPIO
CBUS0, CBUS1, CBUS2,
CBUS3
CBUS bit bang mode option. Allows up to 4 of the CBUS pins to be
used as general purpose I/O. Configured individually for CBUS0,
CBUS1, CBUS2 and CBUS3 in the internal MTP ROM. A separate
application note,
AN232R-01, available from FTDI website
(
www.ftdichip.com) describes in more detail how to use CBUS bit
bang mode.
BCD_Charger
CBUS0 - CBUS5
Battery charge Detect, indicates when the device is connected to a
dedicated battery charger host. Active high output.
BCD_Charger#
CBUS0 - CBUS5
Inverse of BCD Charger
BitBang_WR#
CBUS0 - CBUS5
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
CBUS0 - CBUS5
Synchronous and asynchronous bit bang mode RD# strobe output.
I2C_TXE
CBUS0 - CBUS5
Transmit buffer empty, used to indicate to I2C master device status
of the FT201X transmit buffer
I2C_RXF
CBUS0 - CBUS5
Receive buffer full, used to indicate to I2C master device status of
FT201X receive buffer
VBUS_Sense
CBUS0 - CBUS5
Input to detect when VBUS is present.
Time_Stamp
CBUS0 - CBUS5
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
CBUS0 - CBUS5
Active Low input, prevents the chip from going into suspend.
Table 4.2 – CBUS Signal Options


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