TPS70445, TPS70448, TPS70451, TPS70458, TPS70402

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

WITH INTEGRATED SVS FOR SPLIT VOLTAGE SYSTEMS

SLVS307B – SEPTEMBER 2000 – REVISED APRIL 2003

3

POST OFFICE BOX 655303

detailed block diagram – fixed voltage version

UVLO1

Thermal

Shutdown

Shutdown

2.5 V

+

–

Current

Sense

Reference

Vref

Vref

ENA_1

ENA_1

10 k

Ω

Falling Edge

Delay

VPGD_1

VSENSE1

Rising Edge

Deglitch

ENA_1

ENA_2

Current

Sense

+

–

10 k

Ω

ENA_2

ENA_2

FB2

Vref

VIN1 (2 Pins)

GND

EN1

EN2

VIN2 (2 Pins)

VSENSE1

(see Note A)

PG1

MR

RESET

VSENSE2

(see Note A)

FB1

VIN1

UVLO1

VPGD_2

VSENSE2

Rising Edge

Deglitch

PG2

UVLO2

UVLO1

VOUT1 (2 Pins)

VOUT2 (2 Pins)

Shutdown

2.5 V

UVLO2

VPGD1

VPGD2

UVLO2

NOTE A: Formostapplications,VSENSE1andVSENSE2shouldbeconnectedtoVOUT1andVOUT2respectivelyascloseaspossibletothedevice.

For other implementations, refer to SENSE terminal connection discussion in the application information section.