PC33889

4

PC33889

Idd1 stop output current to wake up SBC

Idd1s-wu1

2

3.5

5

mA

Selectable by SPI. Default

value after reset.

Idd1 stop output current to wake up SBC

Idd1s-wu2

10

14

18

mA

Selectable by SPI

Idd1 over current wake deglitcher (with

Idd1s-wu1 selected)

Idd1-dglt1

40

75

55

us

Guaranteed by design

Idd1 over current wake deglitcher (with

Idd1s-wu2 selected)

Idd1-dglt2

150

us

Guaranteed by design

Thermal Shutdown

Tsd

160

190

°C

Normal or standby mode

Over temperature pre warning

Tpw

130

160

°C

VDDTEMP bit set

Temperature Threshold difference

Tsd-Tpw

20

40

°C

Reset threshold 1

Rst-th1

4.5

4.6

4.7

Selectable by SPI. Default

value after reset.

Reset threshold 2

Rst-th2

4.1

4.2

4.3

Selectable by SPI

Reset duration

reset-dur

0.85

1

2

ms

Vdd1 range for Reset Active

1V

Reset Delay Time

520

us

measured at 50% of reset sig-

nal. Guaranteed by design

Line Regulation

LR1

5

25

mV

Line Regulation

LR2

10

25

mV

Load Regulation

LD

20

50

mV

Thermal stability

ThermS

5

mV

Vsup=13.5V, I=100mA

V2 tracking voltage regulator

note 7: V2 specification with external capacitor

- option 1: C>=22uF and ESR<1O ohm

- option2: 1uF<C<22uF and ESR<10 ohm. In this case depending upon ballast transistor gain an additional resistor and capacitor network

between emitter and base of PNP ballast transistor might be required.

V2 Output Voltage

V2

0.99

1

1.01

Vdd1

I2 from 2 to 200mA

5.5V< Vsup <27V

I2 output current (for information only)

I2

200

mA

Depending upon external bal-

last transistor

V2 ctrl drive current

I2ctrl

tbd

10

tbd

mA

Logic output pins (MISO)

Low Level Output Voltage

Vol

1.0

V

I out = 1.5mA

High Level Output Voltage

Voh

Vdd1-0.9

V

I out = -250uA

Tristated MISO Leakage Current

-2

+2

uA

Logic input pins (MOSI, SCLK, CSB)

High Level Input Voltage

Vih

0.7Vdd1

Vdd1+0.3

V

Low Level Input Voltage

Vil

-0.3

0.3Vdd1

V

High Level Input Current on CSB

Iih

-100

-20

uA

Low Level Input Current CSB

Iil

-100

-20

uA

MOSI, SCLK Input Current

Iin

-10

10

uA

Reset Pin (output pin only)

High Level Output current

Ioh

-250

uA

Vol

0

0.9

V

Vol

0

0.9

V

Reset pull down current

Ipdw

2.4

5

mA

Reset Duration after Vdd High

reset-dur

1

2

ms

Wdogb output pin

Description

Symbol

Characteristics

Unit

Conditions

Min

Typ

Max

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com