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IDT71V124SA15PH Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT71V124SA15PH Datasheet(HTML) 3 Page - Integrated Device Technology |
3 / 8 page 6.42 IDT71V124SA, 3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges 3 +1.5V 50 Ω I/O Z0 =50 Ω 3873 drw 03 30pF . *Including jig and scope capacitance. Figure 2. AC Test Load (for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ) Figure 1. AC Test Load AC Test Conditions DC Electrical Characteristics(1, 2) (VDD = Min. to Max., VLC = 0.2V, VHC = VDD 0.2V) 3873 drw 04 320 Ω 350 Ω 5pF* DATAOUT 3.3V NOTES: 1. All values are maximum guaranteed values. 2. All inputs switch between 0.2V (Low) and VDD–0.2V (High). 3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing. Symbol Parameter 71V124SA10 71V124SA12 71V124SA15 71V124SA20 Unit Com'l Only Com'l Ind Com'l Ind Com'l Ind ICC Dynamic Operating Current CS < VLC, Outputs Open, VDD = Max., f = fMAX(3) 145 130 140 100 120 95 115 mA ISB Dynamic Standby Power Supply Curren t CS > VHC, Outputs Open, VDD = Max., f = fMAX(3) 45 40 40 35 40 30 35 mA ISB1 Full Standby Power Supply Current (static) CS > VHC, Outputs Open, VDD = Max., f = 0(3) 10 10 10 10 10 10 10 mA 3873 tbl 06 Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 3ns 1.5V 1.5V See Figure 1 and 2 3873 tbl 07 |
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