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IDT71V124SA20PH Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT71V124SA20PH Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 8 page 4 IDT71V124SA, 3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges AC Electrical Characteristics (VDD = Min. to Max., Commercial and Industrial Temperature Ranges) NOTES: 1. 0°C to +70°C temperature range only. 2. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested. Symbol Parameter 71V124SA10(1) 71V124SA12 71V124SA15 71V124SA20 Unit Min. Max. Min. Max. Min. Max. Min. Max. READ CYCLE tRC Read Cycle Time 10 ____ 12 ____ 15 ____ 20 ____ ns tAA Address Access Time ____ 10 ____ 12 ____ 15 ____ 20 ns tACS Chip Select Access Time ____ 10 ____ 12 ____ 15 ____ 20 ns tCLZ (2) Chip Select to Output in Low-Z 4 ____ 4 ____ 4 ____ 4 ____ ns tCHZ (2) Chip Deselect to Output in High-Z 0506070 8 ns tOE Output Enable to Output Valid ____ 5 ____ 6 ____ 7 ____ 8ns tOLZ (2) Output Enable to Output in Low-Z 0 ____ 0 ____ 0 ____ 0 ____ ns tOHZ (2) Output Disable to Output in High-Z 0505050 7 ns tOH Output Hold from Address Change 4 ____ 4 ____ 4 ____ 4 ____ ns WRITE CYCLE tWC Write Cycle Time 10 ____ 12 ____ 15 ____ 20 ____ ns tAW Address Valid to End-of-Write 7 ____ 8 ____ 10 ____ 12 ____ ns tCW Chip Select to End-of-Write 7 ____ 8 ____ 10 ____ 12 ____ ns tAS Address Set-up Time 0 ____ 0 ____ 0 ____ 0 ____ ns tWP Write Pulse Width 7 ____ 8 ____ 10 ____ 12 ____ ns tWR Write Recovery Time 0 ____ 0 ____ 0 ____ 0 ____ ns tDW Data Valid to End-of-Write 5 ____ 6 ____ 7 ____ 9 ____ ns tDH Data Hold Time 0 ____ 0 ____ 0 ____ 0 ____ ns tOW (2) Output Active from End-of-Write 3 ____ 3 ____ 3 ____ 4 ____ ns tWHZ (2) Write Enable to Output in High-Z 0505050 8 ns 3873 tbl 08 |
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