D1

D2

D3

D4

D5

D6

D7

D9

D8

D11

D0

D1

D2

D3

D11

D10

D4

D5

BCLK+

WCLK-

Output data

System Clock

Sample n

Sample n+1

WCLK+

BCLK-

DOn+

DOn-

Word Clock

Bit Clock

D0

D10

ADC12EU050

www.ti.com

SNAS444I – JANUARY 2008 – REVISED APRIL 2013

AC AND TIMING CHARACTERISTICS (SERIAL INTERFACE)

Symb

Parameter

Conditions

Limits

Units

ol

Serial Interface

250

ns

250

ns

250

15

ns (max)

250

10

ns (max)

1

0.2

µs (min)

450

ns (min)

450

ns (min)

50

ns

50

ns

Applies to read and write transactions

500

ns

100

-5

ns (min)

transaction

250

10

ns (min)

(1)

Typical figures are at TA = 25°C, and represent most likely parametric norms at the time of product characterization. The typical

specifications are not ensured.

TIMING DIAGRAMS

Figure 2. LVDS/SLVS Output Timing

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