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ADS54J42IRMP Datasheet(PDF) 7 Page - Texas Instruments |
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ADS54J42IRMP Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 81 page  7 ADS54J42 www.ti.com SBAS756A – FEBRUARY 2016 – REVISED MARCH 2016 Product Folder Links: ADS54J42 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) See the Power-Down Mode section for details. 7.5 Electrical Characteristics typical values are at TA = 25°C, full temperature range is from TMIN = –40°C to TMAX = 85°C, ADC sampling rate = 625 MSPS, 50% clock duty cycle, AVDD3V = 3.0 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, and –1-dBFS differential input (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT GENERAL ADC sampling rate 625 MSPS Resolution 14 Bits POWER SUPPLIES AVDD3V 3.0-V analog supply 2.85 3.0 3.6 V AVDD 1.9-V analog supply 1.8 1.9 2.0 V DVDD 1.9-V digital supply 1.7 1.9 2.0 V IOVDD 1.15-V SERDES supply 1.1 1.15 1.2 V IAVDD3V 3.0-V analog supply current VIN = full-scale on both channels 247 310 mA IAVDD 1.9-V analog supply current VIN = full-scale on both channels 260 410 mA IDVDD 1.9-V digital supply current Eight lanes active (LMFS = 8224) 137 210 mA IIOVDD 1.15-V SERDES supply current Eight lanes active (LMFS = 8224) 382 720 mA Pdis Total power dissipation Eight lanes active (LMFS = 8224) 1.94 2.68 W IDVDD 1.9-V digital supply current Four lanes active (LMFS = 4222), 2X decimation 130 mA IIOVDD 1.15-V SERDES supply current Four lanes active (LMFS = 4222), 2X decimation 404 mA Pdis Total power dissipation Four lanes active (LMFS = 4222), 2X decimation 1.95 W IDVDD 1.9-V digital supply current Two lanes active (LMFS = 2221), 4X decimation 129 mA IIOVDD 1.15-V SERDES supply current Two lanes active (LMFS = 2221), 4X decimation 400 mA Pdis (1) Total power dissipation Two lanes active (LMFS = 2221), 4X decimation 1.94 W Global power-down power dissipation 285 315 mW ANALOG INPUTS (INAP, INAM, INBP, INBM) Differential input full-scale voltage 1.9 VPP VIC Common-mode input voltage 2.0 V RIN Differential input resistance At 170-MHz input frequency 0.6 k Ω CIN Differential input capacitance At 170-MHz input frequency 4.7 pF Analog input bandwidth (3 dB) 50- Ω source driving ADC inputs terminated with 50 Ω 1.2 GHz CLOCK INPUT (CLKINP, CLKINM) Internal clock biasing CLKINP and CLKINM are connected to internal biasing voltage through 400 Ω 1.15 V |
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