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V62-12611-01XE Datasheet(PDF) 5 Page - Texas Instruments |
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V62-12611-01XE Datasheet(HTML) 5 Page - Texas Instruments |
5 / 45 page ADS1278-EP www.ti.com SBAS579 – AUGUST 2012 ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range, unless otherwise noted (1) UNIT AVDD to AGND –0.3 to 6.0 V DVDD, IOVDD to DGND –0.3 to 3.6 V AGND to DGND –0.3 to 0.3 V Momentary 100 mA Input current Continuous 10 mA Analog input to AGND –0.3 to AVDD + 0.3 V Digital input or output to DGND –0.3 to DVDD + 0.3 V Maximum junction temperature, TJ 150 °C Storage temperature range –60 to 150 °C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. THERMAL INFORMATION ADS1278 THERMAL METRIC(1) PAP UNITS 64 PINS θJA Junction-to-ambient thermal resistance(2) 33.1 θJC Junction-to-case thermal resistance 6.2 θJB Junction-to-board thermal resistance(3) 7.9 °C/W ψJT Junction-to-top characterization parameter(4) 0.2 ψJB Junction-to-board characterization parameter(5) 7.8 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. (3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. (4) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). (5) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADS1278-EP |
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