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BQ2054SN Datasheet(PDF) 9 Page - Texas Instruments |
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BQ2054SN Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 19 page  A resistor-divider network can be implemented that presents the defined voltage levels to the TS pin at the desired temperatures (see Figure 6). The equations for determining RT1 and RT2 are: Equation 3 06 0 250 1 .* (. ) *( ) (* ) V V RT1 RT2 R RT2 R CC CC LTF LTF = − + + Equation 4 044 1 1 . *( ) (* ) = + + RT1 RT2 R RT2 R HTF HTF where: n RLTF = thermistor resistance at LTF n RHTF = thermistor resistance at HTF TCO is determined by the values of RT1 and RT2. 1% resistors are recommended. Disabling Temperature Sensing Temperature sensing can be disabled by placing 10k Ω resistors between TS and SNS and between SNS and VCC. Maximum Time-Out MTO is programmed from 1 to 24 hours by an R-C net- work on the TM pin (see Figure 7) per the equation: Equation 5 tMTO = 0.5 * R * C Where R is in k Ω andCisin µF, tMTO is in hours. The maximum value for C (0.1 µF) is typically used. The MTO timer is reset at the beginning of fast charge and when fast charge transitions from the current regu- lated to the voltage regulated mode. If MTO expires dur- ing the current regulated phase, the bq2054 enters the Fault state and terminates charge. If the MTO timer ex- pires during the voltage regulated phase, fast charging terminates and the bq2054 enters the Charge Complete state. The MTO timer is suspended (but not reset) during the out-of-range temperature (Charge Pending) state. Charge Regulation The bq2054 controls charging through pulse-width modulation of the MOD output pin, supporting both constant-current and constant-voltage regulation. Charge current is monitored at the SNS pin, and charge voltage is monitored at the BAT pin. These voltages are compared to an internal reference, and the MOD output modulated to maintain the desired value. Voltage at the SNS pin is determined by the value of re- sistor RSNS, so nominal regulated current is set by: Equation 6 IMAX = 0.250V/RSNS The switching frequency of the MOD output is deter- mined by an external capacitor (CPWM) between the pin TPWM and ground, per the following: Equation 7 FPWM = 0.1/CPWM Where C is in µF and F is in kHz. A typical switching rate is 100kHz, implying CPWM = 0.001 µF. MOD pulse width is modulated between 0 and 90% of the switching period. To prevent oscillation in the voltage and current control loops, frequency compensation networks (C or R-C) are typi- cally required on the VCOMP and ICOMP pins (respectively). 9 TM FG205406.eps VCC VSS bq2054 12 13 1 VSS VCC C R Figure 7. R-C Network for Setting MTO bq2054 |
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