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ADS7891 Datasheet(PDF) 11 Page - Texas Instruments |
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ADS7891 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 31 page ADS7891 SLAS410 − DECEMBER 2003 www.ti.com 11 Sample N Conversion N Data For Conversion N−1 (Data read Without Latency) CONVST BUSY D13−D0 t(conv) + td11 tw4 tw3 t(acq) t0 = 333 ns for 3 MSPS Operation th1 CS td12 Figure 8. Back-To-Back operation With CS Toggling and RD Low NAP MODE The device can be put in nap mode following the sequences shown in Figure 9. This provides substantial power saving while operating at lower sampling rates. While operating the device at throughput rates lower than 2.54 MSPS, A_PWD can be held low (see Figure 9). In this condition, the device goes into the nap state immediately after BUSY goes low and remains in that state until the next sampling starts. The minimum acquisition time is 60 nsec more than t(acq) as defined in the timing requirements section. Alternately, A_PWD can be toggled any time during operation (see Figure 10). This is useful when the system acquires data at the maximum conversion speed for some period of time (back-to-back conversion) and it does not acquire data for some time while the acquired data is being processed. During this period, the device can be put in the nap state to save power. The device remains in the nap state as long as A_PWD is low with BUSY being low and sampling has not started. The minimum acquisition time for the first sampling after the nap state is 60 nsec more than t(acq) as defined in the timing requirements section. A_PWD (Held Low) BUSY SAMPLE (Internal) NAP (Internal Active High) t(acq) + 60 ns NOTE: The SAMPLE (Internal) signal is generated as described in the Sampling and Conversion Start section. Figure 9. Device Operation While A_PWD is Held Low |
Similar Part No. - ADS7891_15 |
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Similar Description - ADS7891_15 |
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