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ADS8912BRGER Datasheet(PDF) 3 Page - Texas Instruments |
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ADS8912BRGER Datasheet(HTML) 3 Page - Texas Instruments |
3 / 68 page Not to scale Thermal Pad 1 CONVST 18 SDO-2 2 RST 17 SDO-3 3 REFIN 16 DVDD 4 REFM 15 GND 5 REFBUFOUT 14 DECAP 6 NC 13 DECAP 3 ADS8910B ADS8912B ADS8914B www.ti.com SBAS707A – JUNE 2016 – REVISED JULY 2016 Product Folder Links: ADS8910B ADS8912B ADS8914B Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 5 Pin Configuration and Functions RGE Package 24-Pin VQFN Top View Pin Functions PIN FUNCTION DESCRIPTION NAME NO. AINM 10 Analog input Negative analog input AINP 9 Analog input Positive analog input CS 24 Digital input Chip-select input pin; active low The device takes control of the data bus when CS is low. The SDO-x pins go to Hi-Z when CS is high. CONVST 1 Digital input Conversion start input pin. A CONVST rising edge brings the device from ACQ state to CNV state. DECAP 13, 14 Power supply Place decoupling capacitor here for internal power supply. Short pin 13 and 14 together. DVDD 16 Power supply Interface power supply pin GND 11, 15 Power supply Ground NC 6 No connection Float these pins; no external connection. REFBUFOUT 5, 7 Analog input/output Reference buffer output, ADC reference input. Short pin 5 and 7 together. REFIN 3 Analog input Reference voltage input REFM 4, 8 Analog input Reference ground potential RST 2 Digital input Asynchronous reset input pin. A low pulse on the RST pin resets the device. All register bits return to the default state. RVDD 12 Power supply Analog power supply pin. RVS 21 Digital output Multifunction output pin. With CS held high, RVS reflects the status of the internal ADCST signal. With CS low, the status of RVS depends on the output protocol selection. SCLK 23 Digital input Clock input pin for the serial interface. All system-synchronous data transfer protocols are timed with respect to the SCLK signal. SDI 22 Digital input Serial data input pin. This pin is used to feed data or commands into the device. |
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