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CC1100ERTKR Datasheet(PDF) 5 Page - Texas Instruments |
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CC1100ERTKR Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 95 page  CC1100E SWRS082 Page 5 of 92 14 DEMODULATOR, SYMBOL SYNCHRONIZER, AND DATA DECISION .................................. 32 14.1 FREQUENCY OFFSET COMPENSATION........................................................................................................ 32 14.2 BIT SYNCHRONIZATION............................................................................................................................. 32 14.3 BYTE SYNCHRONIZATION.......................................................................................................................... 32 15 PACKET HANDLING HARDWARE SUPPORT .............................................................................. 33 15.1 DATA WHITENING ..................................................................................................................................... 33 15.2 PACKET FORMAT....................................................................................................................................... 34 15.3 PACKET FILTERING IN RECEIVE MODE ...................................................................................................... 36 15.4 PACKET HANDLING IN TRANSMIT MODE................................................................................................... 36 15.5 PACKET HANDLING IN RECEIVE MODE ..................................................................................................... 37 15.6 PACKET HANDLING IN FIRMWARE............................................................................................................. 37 16 MODULATION FORMATS ................................................................................................................. 38 16.1 FREQUENCY SHIFT KEYING ....................................................................................................................... 38 16.2 MINIMUM SHIFT KEYING........................................................................................................................... 38 16.3 AMPLITUDE MODULATION ........................................................................................................................ 39 17 RECEIVED SIGNAL QUALIFIERS AND LINK QUALITY INFORMATION ............................ 39 17.1 SYNC WORD QUALIFIER............................................................................................................................ 39 17.2 PREAMBLE QUALITY THRESHOLD (PQT) .................................................................................................. 39 17.3 RSSI.......................................................................................................................................................... 40 17.4 CARRIER SENSE (CS)................................................................................................................................. 41 17.5 CLEAR CHANNEL ASSESSMENT (CCA) ..................................................................................................... 43 17.6 LINK QUALITY INDICATOR (LQI) .............................................................................................................. 43 18 FORWARD ERROR CORRECTION WITH INTERLEAVING ..................................................... 43 18.1 FORWARD ERROR CORRECTION (FEC)...................................................................................................... 43 18.2 INTERLEAVING .......................................................................................................................................... 44 19 RADIO CONTROL................................................................................................................................ 45 19.1 POWER-ON START-UP SEQUENCE ............................................................................................................. 45 19.2 CRYSTAL CONTROL................................................................................................................................... 46 19.3 VOLTAGE REGULATOR CONTROL.............................................................................................................. 47 19.4 ACTIVE MODES ......................................................................................................................................... 47 19.5 WAKE ON RADIO (WOR).......................................................................................................................... 48 19.6 TIMING ...................................................................................................................................................... 49 19.7 RX TERMINATION TIMER .......................................................................................................................... 49 20 DATA FIFO ............................................................................................................................................ 50 21 FREQUENCY PROGRAMMING........................................................................................................ 51 22 VCO ......................................................................................................................................................... 52 22.1 VCO AND PLL SELF-CALIBRATION .......................................................................................................... 52 23 VOLTAGE REGULATORS ................................................................................................................. 52 24 OUTPUT POWER PROGRAMMING ................................................................................................ 52 25 SHAPING AND PA RAMPING............................................................................................................ 53 26 GENERAL PURPOSE / TEST OUTPUT CONTROL PINS ............................................................. 54 27 ASYNCHRONOUS AND SYNCHRONOUS SERIAL OPERATION .............................................. 56 27.1 ASYNCHRONOUS SERIAL OPERATION........................................................................................................ 56 27.2 SYNCHRONOUS SERIAL OPERATION .......................................................................................................... 56 28 SYSTEM CONSIDERATIONS AND GUIDELINES ......................................................................... 57 28.1 SRD REGULATIONS................................................................................................................................... 57 28.2 FREQUENCY HOPPING AND MULTI-CHANNEL SYSTEMS............................................................................ 57 28.3 DATA BURST TRANSMISSIONS................................................................................................................... 58 28.4 CONTINUOUS TRANSMISSIONS .................................................................................................................. 58 28.5 LOW COST SYSTEMS ................................................................................................................................. 59 28.6 BATTERY OPERATED SYSTEMS ................................................................................................................. 59 28.7 INCREASING OUTPUT POWER .................................................................................................................... 59 29 CONFIGURATION REGISTERS........................................................................................................ 59 29.1 CONFIGURATION REGISTER DETAILS – REGISTERS WITH PRESERVED VALUES IN SLEEP STATE............... 64 29.2 CONFIGURATION REGISTER DETAILS – REGISTERS THAT LOOSE PROGRAMMING IN SLEEP STATE ......... 84 |
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