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VCE6467TZUTL1 Datasheet(PDF) 2 Page - Texas Instruments |
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VCE6467TZUTL1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 353 page VCE6467T, AVCE6467T SPRS690 – MARCH 2011 www.ti.com (BT.1120), or Single Raw (8-/10-/12-Bit) Video • 32-Bit, 66-MHz, 3.3 V Peripheral Component Capture Channels Interconnect (PCI) Master/Slave Interface – Two 8-Bit SD (BT.656) or Single 16-Bit HD – Conforms to PCI Specification 2.3 (BT.1120) Video Display Channels • Two 64-Bit General-Purpose Timers (Each • Video Data Conversion Engine (VDCE) Configurable as Two 32-Bit Timers) – Horizontal and Vertical Downscaling • One 64-Bit Watch Dog Timer – Chroma Conversion (4:2:2 ↔4:2:0) • Three Configurable UART/IrDA/CIR Modules (One With Modem Control Signals) • Two Transport Stream Interface (TSIF) Modules (One Parallel/Serial and One Serial Only) – Supports up to 1.8432 Mbps UART – TSIF for MPEG Transport Stream – SIR and MIR (0.576 MBAUD) – Simultaneous Synchronous or – CIR With Programmable Data Encoding Asynchronous Input/Output Streams • One Serial Peripheral Interface (SPI) With Two – Absolute Time Stamp Detection Chip-Selects – PID Filter With 7 PID Filter Tables • Master/Slave Inter-Integrated Circuit (I2C Bus™) – Corresponding Clock Reference Generator • Two Multichannel Audio Serial Ports (McASPs) (CRGEN) Modules for System Time-Clock – One Four Serializer Transmit/Receive Port Recovery – One Single DIT Transmit Port for S/PDIF • External Memory Interfaces (EMIFs) • 32-Bit Host Port Interface (HPI) – Up to 400-MHz 32-Bit DDR2 SDRAM Memory • VLYNQ™ Interface (FPGA Interface) Controller With 512M-Byte Address Space • Two Pulse Width Modulator (PWM) Outputs (1.8-V I/O) • ATA/ATAPI I/F (ATA/ATAPI-6 Specification) – Asynchronous16-Bit Wide EMIF (EMIFA) • Up to 33 General-Purpose I/O (GPIO) Pins With 128M-Byte Address Reach (Multiplexed With Other Device Functions) • Flash Memory Interfaces • On-Chip ARM ROM Bootloader (RBL) – NOR (8-/16-Bit-Wide Data) • Individual Power-Saving Modes for ARM/DSP – NAND (8-/16-Bit-Wide Data) • Flexible PLL Clock Generators • Enhanced Direct-Memory-Access (EDMA) • IEEE-1149.1 (JTAG) Boundary- Controller (64 Independent Channels) Scan-Compatible – Programmable Default Burst Size • 529-Pin Pb-Free BGA Package • 10/100/1000 Mb/s Ethernet MAC (EMAC) (ZUT Suffix), 0.8-mm Ball Pitch – IEEE 802.3 Compliant (3.3-V I/O Only) • 0.09- μm/7-Level Cu Metal Process (CMOS) – Supports MII and GMII Media Independent • 3.3-V and 1.8-V I/O, 1.3-V Internal Interfaces • Applications: – Management Data I/O (MDIO) Module – Video Encode/Decode/Transcode/Transrate • USB Port With Integrated 2.0 PHY – Digital Media – USB 2.0 High-/Full-Speed Client – Networked Media Encode/Decode – USB 2.0 High-/Full-/Low-Speed Host – Video Imaging (Mini-Host, Supporting One External – Video Infrastructure Device) – Video Conferencing 2 Digital Media System-on-Chip (DMSoC) Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): VCE6467T AVCE6467T |
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