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BQ24351 Datasheet(PDF) 4 Page - Texas Instruments |
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BQ24351 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 18 page  bq24351 SLUSA62A – OCTOBER 2010 – REVISED NOVEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS Refer to the typical application circuit shown in Figure 1 . These specifications apply over ACIN = 5V, TJ = -40 to 125°C, unless otherwise specified. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ACIN ACIN: 3V → 2V, ACIN falling 1.8 1.95 2.1 VUVLO Under-voltage lock-out threshold V ACIN: 2V → 3V, ACIN rising 2.5 tBLK(CHGIN) Input power on blanking time ACIN rising to CHGIN rising 10 ms IDD Operating current No load on OUT and CHGIN pin 500 mA INPUT TO OUTPUT CHARACTERISTICS On resistance from ACIN to OUT IOUT = 1.0A, ACIN = 5V, GATDRV = 0V 415 685 m Ω On resistance from ACIN to CHGIN ICHGIN = 1.0A, ACIN = 5V, IOUT = 0A 250 495 m Ω INPUT OVER-VOLTAGE PROTECTION (OVP) ACIN = 7.1V, GATDRV = CHGIN, ICHGIN = 0 to VOREG CHGIN voltage in LDO mode 6.25 6.38 6.52 V 1A VOVP Input OVP threshold ACIN rising 10.2 10.5 10.8 V VHYS-OVP Input OVP recovery hysteresis ACIN: 12V → 9V 145 160 175 mV tDGL(OVP) Input OVP deglitch time ACIN rising to CHGIN falling 256 mS tREC(OVP) Input OVP recovery time ACIN falling below VOVP to CHGIN rising 8.2 ms INPUT OVER CURRENT LIMITING AND PROTECTION (OCP) IO(OCP) OCP threshold 1.02 1.2 1.38 A tDGL(OCP) OCP blanking time 176 µs tREC(OCP) OCP recovery time 131 ms BATTERY OVER-VOLTAGE PROTECTION BVOVP Battery OVP threshold VBAT rising 4.3 4.35 4.4 V VHYS-BOVP Battery OVP hysteresis VBAT falling 200 250 300 mV VBAT = 4.25V, series connection of a 200-k Ω IVBAT VBAT pin leakage current 10 nA resistor, TJ = 25°C tDGL(BOVP) Battery OVP deglitch time VBAT rising to CHGIN falling 8.2 ms tREC(BOVP) Battery OVP recovery time VBAT falling below BVOVP to CHGIN rising 131 ms CHGIN Sleep mode exit threshold and CHGIN turn VSEXIT ACIN rising, OUT = 4.2 V 24 90 160 mV on threshold, ACIN-OUT Sleep mode entry threshold and CHGIN VSENTRY ACIN falling, OUT = 4.2 V 10 55 105 mV turn off threshold, ACIN-OUT OUT = 4.2 V, GATDRV = 4.2 V, IDDSLP Sleep mode supply current 10 mA ACIN = VSS RDIS CHGIN discharge resistor 500 Ω OUT = 4.2 V, GATDRV = 4.2 V, CHGIN = 0 V, Leakage current from OUT to CHGIN 1 mA ACIN = 0 V, TJ = 85°C INTEGRATED P-FET PARAMETERS Vt Threshold voltage, CHGIN-GATDRV CHGIN = 5V, OUT = 3.6V, IOUT = 10mA 500 680 800 mV Ig GATDRV pin leakage current 0.1 1 mA Ioff Off state leakage current at OUT pin ACIN = 5V, GATDRV = CHGIN, OUT = 0V 1 mA On resistance of P-FET (from CHGIN to Ronp IOUT = 1.0A, ACIN = 5V, GATDRV = 0V 165 225 m Ω OUT) Gm Forward transconductance ACIN = 5V, IOUT = 5mA, GATDRV = 3.5V 27 mA/V Cg Input capacitance at the GATDRV pin CHGIN = GATDRV = 5V 104 pF THERMAL PROTECTION TJ(OFF) Thermal shutdown threshold Junction temperature rising 140 150 160 °C TJ(OFF-HYS) Thermal shutdown hysteresis Junction temperature falling 20 °C 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): bq24351 |
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