bq26221

SLUS607 − MAY 2004

4

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VFC characteristics over recommended operating temperature and supply voltage (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VI(SR)

Input voltage VSRP − VSRN

−100

100

mV

G(VFC)

Charge/discharge gain

Temperature = 25

_C,

VCC = 3.6

90.0

93.5

97.0

Hz/V

G(VCC)

Supply voltage gain coefficient

−100 mV < (V(SRP) − V(SRN)) < 100 mV

0.5

%/V

G(TCO)

Temperature gain coefficient

0.005

%/

_C

INL

Integrated nonlinearity

−100 mV < (V(SRP) − V(SRN)) < 100 mV

0.2%

0.5%

V(COS)

Auto compensated offset

2.8 V

≤ VCC ≤ 4.2 V

−20

−1

20

µV

flash memory characteristics over recommended operating temperature and supply voltage

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Data retention

5

Years

Flash programming write-cycles

10,000

Cycles

t(BYTEPROG) Byte programming time

90

t(BLCKPROG)

RAM-to-flash block programming

time

60

µs + 30 µs/byte

1020

µs

t(BLKERASE) Block-erase time

60

µs + 30 µs/byte

1020

standard serial communication (HDQ) timing specification over recommended operating

temperature and supply voltage (unless otherwise noted). See Figures 1 and 2.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

T(B)

Break timing

190

T(BR)

Break recovery

40

T(CYCH)

Host bit window

190

T(HW1)

Host sends 1

0.5

50

µs

T(HW0)

Host sends 0

92

145

µs

T(RSPS)

bq26221 to host response

190

320

T(CYCB)

bq26221 bit window

190

250

T(start−detect) (1)

5

ns

T(DW1)

bq26221, sends 1

32

50

s

T(DW0)

bq26221, sends 0

80

145

µs

NOTE 1. The HDQ engine of the bq26221 interpret a 5 ns or longer glitch on HDQ as a bit start. A sufficient number of glitches at 5 ns or longer

could result in incorrect data being written to the device. The HDQ line should be properly deglitched to ensure that this does not occur.

Not Recommended For New Designs