bq26501

SLUS586B − OCTOBER 2003 − REVISED MARCH 2004

10

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APPLICATION INFORMATION

Register Interface for bq26501

The bq26501 stores all calculated information in RAM, which is backed up by the voltage present on the RBI

pin. EEPROM registers store permanent user data. The memory map for bq26501 is shown in Table 1.

Table 1. bq26501 Memory Map

HDQ ADDRESS

NAME

FUNCTION (256 x High Byte + Low Byte)

LSB VALUE

EEPROM Registers

0x7F

TCOMP

Temperature compensation constants, OR, ID#1

0x7E

DCOMP

Discharge rate compensation constants, OR, ID#2

0x7D

ID3

ID#3

0x7C

PKCFG

Pack configuration values

0x7B

TAPER

Charge termination taper current

192

µV(1)

0x7A

DMFSD

Digital magnitude filter and self-discharge rate constants

0x79

ISLC

Initial standby load current

6

µV(1)

0x78

SEDV1

Scaled EDV1 threshold

0x77

SEDVF

Scaled EDVF threshold

0x76

ILMD

Initial last measured discharge high byte

768

µVh(1)

RAM Registers

0x6F − 0x75

−

RESERVED

0x6E

EE_EN

EEPROM program enable

0x14 − 0x6D

−

RESERVED

0x13 − 0x12

LMD

Last measured discharge high − low byte

3

µVh(1)

0x11 − 0x10

CACT

Temperature compensated CACD high – low byte

3

µVh(1)

0x0F − 0x0E

CACD

Discharge compensated NAC high − low byte

3

µVh(1)

0x0D − 0x0C

NAC

Nominal available capacity high − low byte

3

µVh(1)

0x0B

RSOC

Relative state of charge

1%

0x0A

FLAGS

Status flags

0x09 − 0x08

VOLT

Reported voltage high − low byte

1 mV

0x07 − 0x06

TEMP

Reported temperature high − low byte

0.25

°K

0x05 − 0x04

ARTTE

At rate time-to-empty high − low byte

1 minute

0x03 − 0x02

AR

At rate high − low byte

3

µV(1)

0x01

MODE

Device mode register

0x00

CTRL

Device control register

(1) Divide by RS(mΩ) to convert µV to mA or µVh to mAh.

Not Recommended For New Designs