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DAC39J84IAAV Datasheet(PDF) 10 Page - Texas Instruments |
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DAC39J84IAAV Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 149 page  DAC39J84 SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015 www.ti.com 6.6 Digital Electrical Characteristics Typical values at TA = 25°C, full temperature range is TMIN = –40°C to TMAX = 85°C, nominal supplies, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CML SERDES INPUTS: RX[7:0]P/N VDIFF Receiver Input Amplitude 50 1200 mV Input Common Mode (TERM=111) 600 Input Common Mode (TERM=001) 700 VCOM mV Input Common Mode (TERM=100) 0 Input Common Mode (TERM=101) 250 ZDIFF Internal differential termination 85 100 115 Ω fDATA Serdes bit rate 0.78125 12.5 Gbps LVPECL INPUTS: SYSREFP/N VCOM Input common mode voltage 0.5 V Differential input peak-to-peak VIDPP 400 800 mV voltage ZT Internal termination 100 Ω CL Input capacitance 2 pF LVPECL INPUTS: DACCLKP/N VCOM Input common mode voltage 0.5 V Differential input peak-to-peak VIDPP 400 800 mV voltage ZT Internal termination 100 Ω CL Input capacitance 2 pF Duty cycle 40% 60% fDACCLK DACCLKP/N Input Frequency 2.5 GHz LVDS OUTPUTS: SYNCBP/N VCOM Output common mode voltage 1.2 V ZT Internal termination 100 Ω VOD Differential output voltage swing 0.5 V CMOS INTERFACE: SDENB, SCLK, SDIO, SDO, TXENA, ALARM, RESETB, SLEEP, TMS, TCLK, TDI, TDO, TRSTB, TESTMODE, SYNC_N_AB, SYNC_N_CD 0.7 x VIH High-level input voltage V VDDIO 0.3 x VIL Low-level input voltage V VDDIO IIH High-level input current -40 40 µA IIL Low-level input current -40 40 µA CI CMOS Input capacitance 2 pF VDDIO – Iload =–100 μA 0.2 VOH ALARM, SDO, SDIO, TDO V 0.8 x Iload = –2 mA VDDIO Iload = 100 μA 0.2 VOL ALARM, SDO, SDIO, TDO V Iload = 2 mA 0.5 10 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: DAC39J84 |
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