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DAC121S101MDR Datasheet(PDF) 2 Page - Texas Instruments |
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DAC121S101MDR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page POWER-ON RESET DAC REGISTER INPUT CONTROL LOGIC 12-BIT DAC 12 12 POWER-DOWN CONTROL LOGIC BUFFER 5k 100k SCLK DIN SYNC REF(+) REF(-) VA GND DAC121S101 VOUT DAC121S101QML SNAS410E – MAY 2008 – REVISED MARCH 2013 www.ti.com Block Diagram These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage, VA 6.5 V Voltage on any Input Pin −0.3 V to (VA + 0.3 V) Input Current at Any Pin(3) 10 mA Maximum Output Current(4) 10 mA VOUT Pin in Powerdown Mode 1.0 mA Package Input Current(3) 20 mA Power Dissipation at TA = 25°C See(5) Maximum Junction Temperature 175°C Lead Temperature CLGA package (Soldering 10 Seconds) 260°C Storage Temperature −65°C to +150°C Package Weight (Typical) CLGA package 220 mg ESD Tolerance(6) Class 3A (5000 V) (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. (2) All voltages are measured with respect to GND = 0 V, unless otherwise specified (3) When the input voltage at any pin exceeds the power supplies (that is, less than GND, or greater than VA), the current at that pin should be limited to 10 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. (4) Maximum Output Current may not exceed 10 mA. At VDD = 5.5 V the minimum external resistive load can be no less than 550 Ω, (360 Ω at VDD = 3.6 V). (5) The absolute maximum junction temperature (TJmax) for this device is 175°C. The maximum allowable power dissipation is dictated by TJmax, the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX = (TJmax − TA) / θJA. The values for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. (6) Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through ZERO Ohms. 2 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: DAC121S101QML |
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