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CD74ACT297 Datasheet(PDF) 11 Page - Texas Instruments |
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CD74ACT297 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 18 page CD74ACT297 DIGITAL PHASE-LOCKED LOOP SCHS297D – AUGUST 1998 – REVISED JUNE 2002 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 50% VCC 3 V 3 V 0 V 0 V th tsu VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Data Input tPLH tPHL tPHL tPLH VOH VOH VOL VOL 3 V 0 V 50% VCC 50% VCC Input Out-of-Phase Output In-Phase Output Timing Input 50% VCC VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 2 × VCC 500 Ω 500 Ω Output Control (low-level enabling) Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at GND (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ ≈VCC 0 V 50% VCC 20% VCC 50% VCC 80% VCC ≈0 V 3 V GND Open VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND TEST S1 3 V 0 V tw VOLTAGE WAVEFORMS INPUT RISE AND FALL TIMES AND PULSE DURATION Input NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement. 90% 90% 10% 10% tf tr 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V Figure 11. Load Circuit and Voltage Waveforms |
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