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DAC7731E Datasheet(PDF) 3 Page - Texas Instruments |
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DAC7731E Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page  DAC7731 3 SBAS249B www.ti.com DAC7731E DAC7731EB DAC7731EC PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS ACCURACY Linearity Error (INL) ±6 ±4 ±3LSB TA = 25°C ±5 ±3 ±2LSB Differential Linearity Error (DNL) ±4 ±2 ±1LSB Monotonicity 14 15 16 Bits Offset Error ±0.1 ✻✻ % of FSR Offset Error Drift ±2 ✻✻ ppm/ °C Gain Error With Internal REF ±0.4 ±0.25 ±0.15 % of FSR With External REF ±0.25 ±0.1 ✻ % of FSR Gain Error Drift With Internal REF ±15 ±10 ±7 ppm/ °C PSRR (VCC or VSS) At Full-Scale 50 200 ✻✻ ✻ ✻ ppm/V ANALOG OUTPUT(1) Voltage Output(2) +11.4/–4.75 0 to 10 ✻✻ V +11.4/–11.4 ±10 ✻✻ V +11.4/–6.4 ±5 ✻✻ V Output Current ±5 ✻✻ mA Output Impeadance 0.1 ✻✻ Ω Maximum Load Capacitance 200 ✻✻ pF Short-Circuit Current ±15 ✻✻ mA Short-Circuit Duration AGND Indefinite ✻✻ REFERENCE Reference Output 9.96 10 10.04 9.975 ✻ 10.025 ✻✻ ✻ V REFOUT Impedance 400 ✻✻ Ω REFOUT Voltage Drift ±15 ±10 ±7 ppm/ °C REFOUT Voltage Adjustment(3) ±25 ✻✻ mV REFIN Input Range(4) 4.75 VCC – 1.4 ✻✻ ✻ ✻ V REFIN Input Current 10 ✻✻ nA REFADJ Input Range Absolute Max Value that 010 ✻✻ ✻ ✻ V can be applied is VCC REFADJ Input Impedance 50 ✻✻ k Ω VREF Output Current –2+2 ✻✻ ✻ ✻ mA VREF Impedance 1 ✻✻ Ω DYNAMIC PERFORMANCE Settling Time to ±0.003% 20V Output Step 3 5 ✻✻ ✻ ✻ µs RL = 5kΩ, CL = 200pF, with external REFOUT to REFIN filter(5) Digital Feedthrough 2 ✻✻ nV-s Output Noise Voltage at 10kHz 100 ✻✻ nV/ √Hz DIGITAL INPUT VIH |IH| < 10µA 0.7 • VDD ✻✻ V VIL |IL| < 10µA 0.3 • VDD ✻✻ V DIGITAL OUTPUT VOH IOH = –0.8mA 3.6 ✻✻ V VOL IOL = 1.6mA 0.4 ✻✻ V POWER SUPPLY VDD +4.75 +5.0 +5.25 ✻✻✻ ✻✻ ✻ V VCC +11.4 +15.75 ✻✻ ✻ ✻ V VSS Bipolar Operation –15.75 –11.4 ✻✻ ✻ ✻ V Unipolar Opeation –15.75 –4.75 ✻✻ ✻ ✻ V IDD 100 ✻✻ µA ICC Unloaded 4 6 ✻✻ ✻ ✻ mA ISS Unloaded –4 –2.5 ✻✻ ✻✻ mA Power No Load, Ext. Reference 85 ✻✻ mW No Load, Int. Reference 100 150 ✻✻ ✻ ✻ mW TEMPERATURE RANGE Specified Performance –40 +85 ✻✻ ✻ ✻ °C ✻ Specifications same as grade to the left. NOTES: (1) With minimum VCC/VSS requirements, internal reference enabled. (2) Please refer to the Theory of Operation section for more information with respect to output voltage configurations. (3) See Figure 11 for gain and offset adjustment connection diagrams when using the internal reference. (4) The minimum value for REFIN must be equal to the greater of VSS +14V and +4.75V, where +4.75V is the minimum voltage allowed. (5) Reference low-pass filter values: 100k Ω, 1.0µF (see Figure 14). ELECTRICAL CHARACTERISTICS All specifications at TA = TMIN to TMAX, VCC = +15V, VSS = –15V, VDD = +5V, Internal refi⁄ence enabled, unless otherwise noted. |
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