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DP83848-EP Datasheet(PDF) 5 Page - Texas Instruments |
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DP83848-EP Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 92 page  DP83848-EP www.ti.com SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013 List of Figures 2-1 Device Block Diagram ........................................................................................................... 10 3-1 DP83848-EP Operating Life Derating Chart .................................................................................. 19 3-2 Power Up Timing ................................................................................................................. 19 3-3 Reset Timing ...................................................................................................................... 20 3-4 MII Serial Management Timing ................................................................................................. 21 3-5 100 Mb/s MII Transmit Timing .................................................................................................. 21 3-6 100 Mb/s MII Receive Timing ................................................................................................... 22 3-7 100BASE-TX Transmit Packet Latency Timing .............................................................................. 22 3-8 100BASE-TX Transmit Packet Deassertion Timing ......................................................................... 23 3-9 100BASE-TX Transmit Timing (tR/F & Jitter) .................................................................................. 24 3-10 100BASE-TX Receive Packet Latency Timing ............................................................................... 25 3-11 100BASE-TX Receive Packet Deassertion Timing .......................................................................... 25 3-12 10 Mb/s MII Transmit Timing ................................................................................................... 26 3-13 10 Mb/s MII Receive Timing .................................................................................................... 26 3-14 10 Mb/s Serial Mode Transmit Timing ......................................................................................... 27 3-15 10 Mb/s Serial Mode Receive Timing ......................................................................................... 27 3-16 10BASE-T Transmit Timing (Start of Packet) ................................................................................ 28 3-17 10BASE-T Transmit Timing (End of Packet) ................................................................................. 28 3-18 10BASE-T Receive Timing (Start of Packet) ................................................................................. 29 3-19 10BASE-T Receive Timing (End of Packet) .................................................................................. 29 3-20 10 Mb/s Heartbeat Timing ....................................................................................................... 30 3-21 10 Mb/s Jabber Timing .......................................................................................................... 30 3-22 10BASE-T Normal Link Pulse Timing ......................................................................................... 30 3-23 Auto-Negotiation Fast Link Pulse (FLP) Timing .............................................................................. 31 3-24 100BASE-TX Signal Detect Timing ............................................................................................ 31 3-25 100 Mb/s Internal Loopback Timing ........................................................................................... 32 3-26 10 Mb/s Internal Loopback Timing ............................................................................................. 33 3-27 RMII Transmit Timing ............................................................................................................ 34 3-28 RMII Receive Timing ............................................................................................................. 35 3-29 Isolation Timing ................................................................................................................... 36 3-30 25 MHz_OUT Timing ............................................................................................................ 36 4-1 PHYAD Strapping Example ..................................................................................................... 40 4-2 AN Strapping and LED Loading Example ..................................................................................... 42 5-1 Typical MDC/MDIO Read Operation ........................................................................................... 47 5-2 Typical MDC/MDIO Write Operation ........................................................................................... 47 6-1 100BASE-TX Transmit Block Diagram ........................................................................................ 48 6-2 100BASE-TX Receive Block Diagram ......................................................................................... 51 6-3 EIA/TIA Attenuation vs. Frequency for 0, 50, 100, 130 and 150 meters of CAT 5 cable ............................... 53 6-4 100BASE-TX BLW Event ....................................................................................................... 53 6-5 10BASE-T Twisted Pair Smart Squelch Operation .......................................................................... 56 7-1 10/100 Mb/s Twisted Pair Interface ............................................................................................ 58 7-2 Crystal Oscillator Circuit ......................................................................................................... 59 7-3 Power Feedback Connection ................................................................................................... 60 7-4 Top View, Thermal Vias for GNDPAD, Pin 49 ............................................................................... 62 Copyright © 2012–2013, Texas Instruments Incorporated List of Figures 5 |
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