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DAC8750 Datasheet(PDF) 5 Page - Texas Instruments

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Part # DAC8750
Description  DACx750 Single-Channel, 12- and 16-Bit Programmable Current Output Digital-to-Analog Converters for 4-mA to 20-mA Current Loop Applications
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DAC8750 Datasheet(HTML) 5 Page - Texas Instruments

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DAC7750, DAC8750
www.ti.com
SBAS538B – DECEMBER 2013 – REVISED JUNE 2016
Product Folder Links: DAC7750 DAC8750
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
AVDD to GND
–0.3
40
V
DVDD to GND
–0.3
6
V
IOUT to GND
–0.3
AVDD
V
REFIN to GND
–0.3
6
V
REFOUT to GND
–0.3
6
V
ALARM to GND
–0.3
6
V
Digital input voltage to GND
–0.3
DVDD + 0.3
V
SDO to GND
–0.3
DVDD + 0.3
V
Current into REFOUT
10
mA
Operating temperature
–40
125
°C
Junction temperature, TJ max
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(3)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
7.2 ESD Ratings
VALUE
UNIT
VESD
Electrostatic discharge(1)
Human body model (HBM) ESD stress voltage(2)
±3000
V
Charged device model (CDM) ESD stress voltage(3)
±1000
(1)
Loop compliance voltage is defined as the voltage at the IOUT pin
7.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
AVDD
10
36
V
DVDD
2.7
5.5
V
Loop compliance voltage
4.95
5.05
V
Reference input voltage
30
µA
Loop compliance voltage (output = 24 mA)(1)
AVDD – 2
V
VIH, Digital input high voltage
2
V
VIL, Digital Input low voltage
3.6 V < AVDD < 5.5 V
0.8
V
2.7 V < AVDD < 2.6 V
0.6
Specified performance temperature
–40
125
°C


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