 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DP83846 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
|
|
||||||||||||||||||||||||||||||
DP83846 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
|
|
11 / 59 page  11 www.national.com 2.0 Configuration This section includes information on the various configura- tion options available with the DP83846A. The configura- tion options described below include: — Device Configuration — Auto-Negotiation — PHY Address and LEDs — Half Duplex vs. Full Duplex — Isolate mode — Loopback mode — BIST 2.1 Auto-Negotiation The Auto-Negotiation function provides a mechanism for exchanging configuration information between two ends of a link segment and automatically selecting the highest per- formance mode of operation supported by both devices. Fast Link Pulse (FLP) Bursts provide the signalling used to communicate Auto-Negotiation abilities between two devices at each end of a link segment. For further detail regarding Auto-Negotiation, refer to Clause 28 of the IEEE 802.3u specification. The DP83846A supports four differ- ent Ethernet protocols (10 Mb/s Half Duplex, 10 Mb/s Full Duplex, 100 Mb/s Half Duplex, and 100 Mb/s Full Duplex), so the inclusion of Auto-Negotiation ensures that the high- est performance protocol will be selected based on the advertised ability of the Link Partner. The Auto-Negotiation function within the DP83846A can be controlled either by internal register access or by the use of the AN_EN, AN1 and AN0 pins.. 2.1.1 Auto-Negotiation Pin Control The state of AN_EN, AN0 and AN1 determines whether the DP83846A is forced into a specific mode or Auto-Nego- tiation will advertise a specific ability (or set of abilities) as given in Table 1. These pins allow configuration options to be selected without requiring internal register access. The state of AN_EN, AN0 and AN1, upon power-up/reset, determines the state of bits [8:5] of the ANAR register. The Auto-Negotiation function selected at power-up or reset can be changed at any time by writing to the Basic Mode Control Register (BMCR) at address 00h. 2.1.2 Auto-Negotiation Register Control When Auto-Negotiation is enabled, the DP83846A trans- mits the abilities programmed into the Auto-Negotiation Advertisement register (ANAR) at address 04h via FLP Bursts. Any combination of 10 Mb/s, 100 Mb/s, Half- Duplex, and Full Duplex modes may be selected. The BMCR provides software with a mechanism to control the operation of the DP83846A. The AN0 and AN1 pins do not affect the contents of the BMCR and cannot be used by software to obtain status of the mode selected. Bits 1 & 2 of the PHYSTS register are only valid if Auto-Negotiation is disabled or after Auto-Negotiation is complete. The Auto- Negotiation protocol compares the contents of the ANLPAR and ANAR registers and uses the results to automatically configure to the highest performance protocol between the local and far-end port. The results of Auto-Negotiation (Auto-Neg Complete, Duplex Status and Speed) may be accessed in the PHYSTS register. Auto-Negotiation Priority Resolution: — (1) 100BASE-TX Full Duplex (Highest Priority) — (2) 100BASE-TX Half Duplex — (3) 10BASE-T Full Duplex — (4) 10BASE-T Half Duplex (Lowest Priority) The Basic Mode Control Register (BMCR) at address 00h provides control for enabling, disabling, and restarting the Auto-Negotiation process. When Auto-Negotiation is dis- abled the Speed Selection bit in the BMCR controls switch- ing between 10 Mb/s or 100 Mb/s operation, and the Duplex Mode bit controls switching between full duplex operation and half duplex operation. The Speed Selection and Duplex Mode bits have no effect on the mode of opera- tion when the Auto-Negotiation Enable bit is set. The Basic Mode Status Register (BMSR) indicates the set of available abilities for technology types, Auto-Negotiation ability, and Extended Register Capability. These bits are permanently set to indicate the full functionality of the DP83846A (only the 100BASE-T4 bit is not set since the DP83846A does not support that function). Table 1. Auto-Negotiation Modes AN_EN AN1 AN0 Forced Mode 0 0 0 10BASE-T, Half-Duplex 0 0 1 10BASE-T, Full-Duplex 0 1 0 100BASE-TX, Half-Duplex 0 1 1 100BASE-TX, Full-Duplex AN_EN AN1 AN0 Advertised Mode 1 0 0 10BASE-T, Half/Full-Duplex 1 0 1 100BASE-TX, Half/Full-Duplex 1 1 0 10BASE-T Half-Duplex 100BASE-TX, Half-Duplex 1 1 1 10BASE-T, Half/Full-Duplex 100BASE-TX, Half/Full-Duplex |
Similar Part No. - DP83846 |
|
Similar Description - DP83846 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
