GND

GND

ENL_0

N/C

LO_0+

LO_0-

LI_0+

LI_0-

MUX_S0

48

47

46

45

44

43

42

41

40

39

38

37

ENA_1

ENB_1

SOA_1+

SOA_1-

SOB_1+

SOB_1-

SIA_1+

SIA_1-

SIB_1+

SIB_1-

N/C

N/C

13

14

15

16

17

18

19

20

21

22

23

24

12 11 10

9

8

7

6

5

4

3

2

1

25 26 27 28 29 30 31 32 33 34 35 36

DAP

(GND)

GND

GND

ENL_0

N/C

LO_0+

LO_0-

LI_0+

LI_0-

MUX_S0

ENA_1

ENB_1

SOA_1+

SOA_1-

SOB_1+

SOB_1-

SIA_1+

SIA_1-

SIB_1+

SIB_1-

N/C

N/C

Channel 0

Channel 1

DS08MB200

www.ti.com

SNLS197D – MAY 2006 – REVISED MARCH 2013

Connection Diagrams

Top View

Top View

Figure 2. WQFN Package

Figure 3. Directional Signal Paths

See Package Number RHS0048A

(Refer to pin names for signal polarity)

DAP = GND

TRI-STATE and Powerdown Modes

The DS08MB200 has output enable control on each of the six onboard LVDS output drivers. This control allows

each output individually to be placed in a low power TRI-STATE mode while the device remains active, and is

useful to reduce power consumption on unused channels. In TRI-STATE mode, some outputs may remain active

while some are in TRI-STATE.

When all six of the output enables (all drivers on both channels) are deasserted (LOW), then the device enters a

Powerdown mode that consumes only 0.5mA (typical) of supply current. In this mode, the entire device is

essentially powered off, including all receiver inputs, output drivers and internal bandgap reference generators.

When returning to active mode from Powerdown mode, there is a delay until valid data is presented at the

outputs because of the ramp to power up the internal bandgap reference generators.

Any single output enable that remains active will hold the device in active mode even if the other five outputs are

in TRI-STATE.

When in Powerdown mode, any output enable that becomes active will wake up the device back into active

mode, even if the other five outputs are in TRI-STATE.

Input Failsafe Biasing

External pull up and pull down resistors may be used to provide enough of an offset to enable an input failsafe

under open-circuit conditions. This configuration ties the positive LVDS input pin to VDD thru a pull up resistor

and the negative LVDS input pin is tied to GND by a pull down resistor. The pull up and pull down resistors

should be in the 5k

Ω to 15kΩ range to minimize loading and waveform distortion to the driver. Please refer to

application note SNLA051B AN-1194, “Failsafe Biasing of LVDS Interfaces” for more information.

Output Characteristics

The output characteristics of the DS08MB200 have been optimized for point-to-point backplane and cable

applications, and are not intended for multipoint or multidrop signaling.

Copyright © 2006–2013, Texas Instruments Incorporated

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