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DRV102T Datasheet(PDF) 10 Page - Texas Instruments |
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DRV102T Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 27 page  DRV102 10 SBVS009B www.ti.com FIGURE 6. Simplified Circuit Model of the Duty Cycle Adjust Pin. FIGURE 5. Using a Voltage Source to Program Duty Cycle. DRV102 D/A Converter (or analog voltage) 1k Ω(1) PWM V PWM 3 Gnd 4 6 5 V S Out NOTE: (1) Required if voltage source can go below 0.1V. 200 µA 3 V S Comparator Duty Cycle Adjust DRV102 19k Ω Resistor or Voltage Source(1) NOTE: (1) Do not drive pin below 0.1V. 3.8V 0.7V f = 24kHz ADJUSTABLE DUTY CYCLE The DRV102’s externally adjustable duty cycle provides an accurate means of controlling power delivered to the load. Duty cycle can be set from 10% to 90% with an external resistor, analog voltage, or the output of a D/A converter. Reduced duty cycle results in reduced power dissipation. This keeps the DRV102 and load cooler, resulting in in- creased reliability for both devices. PWM frequency is a constant 24kHz. Resistor-Controlled Duty Cycle Duty cycle is independently programmed with a resistor (RPWM) connected between the Duty Cycle Adjust pin and ground. Increased resistor values correspond to decreased duty cycles. Table II provides resistor values for typical duty cycles. Resistor values for additional duty cycles can be obtained from Figure 4. For reference purposes, the equation for calculating RPWM is included in Figure 4. FIGURE 4. RPWM versus Duty Cycle. RESISTOR(1) VOLTAGE(2) DUTY CYCLE RPWM (kΩ)VPWM (V) 10 536 3.67 20 137 3.31 30 66.5 2.91 40 39.2 2.49 50 24.9 2.07 60 16.2 1.66 70 10.5 1.26 80 6.65 0.88 90 4.42 0.56 NOTES: (1) Resistor values listed are nearest 1% standard values. (2) Do not drive pin below 0.1V. For additional values, see “Duty Cycle vs Voltage” typical performance curve. TABLE II. Duty Cycle Adjust. TA= +25°C, VS = +24V. Voltage-Controlled Duty Cycle Duty cycle can also be programmed with an analog voltage, VPWM. With VPWM ≈ 0.5V, duty cycle is 100%. Increasing this voltage results in decreased duty cycles. For 0% duty cycle, VPWM is approximately 4V. Table II provides VPWM values for typical duty cycles. See the “Duty Cycle vs Voltage” typical performance curve for additional duty cycle values. The Duty Cycle Adjust pin should not be driven below 0.1V. If the voltage source used can go between 0.1V and ground, a 1k Ω series resistor between the voltage source and the Duty Cycle Adjust pin (Figure 5) is required to limit swing. If the pin is driven below 0.1V, the output will be unpredictable. The DRV102’s internal 24kHz oscillator sets the PWM period. This frequency is not externally adjustable. Duty Cycle Adjust (pin 3) is internally driven by a 200 µA current source and connects to the input of a comparator and a 19k Ω resistor as shown in Figure 6. The DRV102’s PWM control design is inherently monotonic. That is, a decreased voltage (or resistor value) always produces an increased duty cycle. 10 20 40 60 100 80 Duty Cycle (%) 1000 100 10 1 R PWM = [ a + b (DC) + c (DC) 2 + d (DC)3 + e (DC)4]–1 where: a = –4.9686 x 10–8 b = –5.9717 x 10–8 c = 2.9889 x 10–8 d = –5.4837 x 10–10 e = 5.9361 x 10–12 R PWM = [–4.9686 x 10 –8 + (–5.9717 x 10–8) (50) + (2.9889 x 10–8) (50)2 + (–5.4837 x 10–10) (50)3 + (5.9361 x 10–12) (50)4]–1 DC = duty cycle in % For 50% duty cycle: = 24.9k Ω |
Similar Part No. - DRV102T |
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Similar Description - DRV102T |
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