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BQ3285LDSSTR Datasheet(PDF) 10 Page - Texas Instruments |
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BQ3285LDSSTR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 28 page  This bit inhibits the transfer of RTC bytes to the user buffer: 1 = Inhibits transfer and clears UIE 0 = Allows transfer Register C Register C is the read-only event status register. Bits 0, 1, 2, 3 - Unused Bits These bits are always set to 0. UF - Update Event Flag This bit is set toa1atthe end of the update cycle. Reading register C clears this bit. AF - Alarm Event Flag This bit is set to a 1 when an alarm event occurs. Read- ing register C clears this bit. PF - Periodic Event Flag This bit is set to a 1 every tPI time, where tPI is the time period selected by the settings of RS0–RS3 in register A. Reading register C clears this bit. INTF - Interrupt Request Flag This flag is set to a 1 when any of the following is true: AIE = 1 and AF = 1 PIE = 1 and PF = 1 UIE = 1 and UF = 1 Reading register C clears this bit. Register D Register D provides for the read-only data integrity status bit, and the day-of-the-month alarm. Bits6-Unused Bit This bit is always set to 0. VRT - Valid RAM and Time 1 = Valid backup energy source 0 = Backup energy source is depleted When the backup energy source is depleted (VRT = 0), data integrity of the RTC and storage registers is not guaranteed. DA0–DA5 These bits store the value for the day-of-the-month alarm. If DA0–DA5 are set to zero, then the day-of-the- month alarm is disabled . These bits are not affected by a reset. 10 7654 3 210 ---- 0 - 0 0 7654 3 210 --- UF - --- 7654 3 210 -- AF - - --- 7654 3 210 -PF- - - - - - 7654 3 210 INTF - - - - - - - July 1997 bq3285ED/LD Register C Bits 7654 3 210 INTF PF AF UF 0 - 0 0 7654 3 210 -0- - - - - - 7654 3 210 - - DA5 DA4 DA3 DA2 DA1 DA0- Register D Bits 7654 3 210 VRT 0 DA5 DA4 DA3 DA2 DA1 DA0 7654 3 210 VRT - - - - - - - |
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