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ADG3257 Datasheet(PDF) 2 Page - Analog Devices |
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ADG3257 Datasheet(HTML) 2 Page - Analog Devices |
2 / 8 page REV. C –2– ADG3257–SPECIFICATIONS1 (V CC = 5.0 V 10%, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted.) B Version Parameter Symbol Conditions 2 Min Typ 3 Max Unit DC ELECTRICAL CHARACTERISTICS Input High Voltage VINH 2.4 V Input Low Voltage VINL –0.3 +0.8 V Input Leakage Current II 0 VIN 5.5 V ±0.01 ± 1 µA OFF State Leakage Current IOZ 0 A, B VCC ±0.01 ± 1 µA ON State Leakage Current IOZ 0 A, B VCC ±0.01 ± 1 µA Max Pass Voltage 4 VP VIN = VCC = 5 V, IO = –5 µA 3.9 4.2 4.4 V CAPACITANCE 4 A Port OFF Capacitance CA OFF f = 1 MHz 7 pF B Port OFF Capacitance CB OFF f = 1 MHz 5 pF A, B Port ON Capacitance CA, CB ON f = 1 MHz 11 pF Control Input Capacitance CIN f = 1 MHz 4 pF SWITCHING CHARACTERISTICS 4 Propagation Delay A to B or B to A tPD tPHL, tPLH 5 VA = 0 V, CL = 50 pF 0.10 ns Propagation Delay Matching 6 VA = 0 V, CL = 50 pF 0.0075 0.035 ns Bus Enable Time BE to A or B tPZH, tPZL CL = 50 pF, RL = 500 Ω 15 7.5 ns Bus Disable Time BE to A or B tPHZ, tPLZ CL = 50 pF, RL = 500 Ω 1 3.5 7 ns Bus Select Time S to A or B Enable tSEL_EN CL = 50 pF, RL = 500 Ω 812 ns Disable tSEL_DIS CL = 50 pF, RL = 500 Ω 58 ns Max Data Rate VA = 2 V p-p 933 Mbps DIGITAL SWITCH ON Resistance RON VA = 0 V IO = 48 mA, 15 mA, 8 mA, TA = 25 °C2 3 Ω IO = 48 mA, 15 mA, 8 mA 4 Ω VA = 2.4 V IO = 48 mA, 15 mA, 8 mA, TA = 25 °C3 5 Ω IO = 48 mA, 15 mA, 8 mA 6 Ω ON Resistance Matching ∆RON VA = 0 V 48 mA, 15 mA, 8 mA, TA = 25 °C 0.15 0.35 Ω VA = 0 V, 48 mA, 15 mA, 8 mA 0.7 Ω POWER REQUIREMENTS VCC 3.0 5.5 V Quiescent Power Supply Current ICC Digital Inputs = 0 V or VCC 0.001 1 µA Increase in ICC per Input 7 ∆ I CC VCC = 5.5 V, One Input at 3.0 V; Others at VCC or GND 200 µA NOTES 1Temperature range is as follows: B Version: –40 °C to +85°C. 2See Test Circuits and Waveforms. 3All typical values are at T A = 25 °C, unless otherwise noted. 4Guaranteed by design, not subject to production test. 5The digital switch contributes no propagation delay other than the RC delay of the typical R ON of the switch and the load capacitance when driven by an ideal voltage source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 6Propagation delay matching between channels is calculated from ON resistance matching of worst-case channel combinations and load capacitance. 7This current applies to the control pins only and represents the current required to switch internal capacitance at the specified frequency. The A and B ports contribute no significant ac or dc currents as they transition. This parameter is guaranteed by design, not subject to production test. Specifications subject to change without notice. |
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