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LDC1612DNTT Datasheet(PDF) 6 Page - Texas Instruments |
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LDC1612DNTT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 58 page SCL SDA tHD;STA tLOW tr tHD;DAT tHIGH tf tSU;DAT tSU;STA tSU;STO tf START REPEATED START STOP tHD;STA START tSP tr tBUF LDC1612, LDC1614 SNOSCY9 – DECEMBER 2014 www.ti.com 6.6 Switching Characteristics - I2C Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 3.3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE LEVELS VIH Input High Voltage 0.7 ˣVDD V VIL Input Low Voltage 0.3 ˣVDD V VOL Output Low Voltage (3mA sink 0.4 V current) HYS Hysteresis 0.1 ˣVDD V I2C TIMING CHARACTERISTICS fSCL Clock Frequency 10 400 kHz tLOW Clock Low Time 1.3 μs tHIGH Clock High Time 0.6 μs tHD;STA Hold Time (repeated) START After this period, the first clock 0.6 μs condition pulse is generated tSU;STA Set-up time for a repeated START 0.6 μs condition tHD;DAT Data hold time 0 μs tSU;DAT Data setup time 100 ns tSU;STO Set-up time for STOP condition 0.6 μs tBUF Bus free time between a STOP 1.3 μs and START condition tVD;DAT Data valid time 0.9 μs tVD;ACK Data valid acknowledge time 0.9 μs tSP Pulse width of spikes that must be 50 ns suppressed by the input filter(1) (1) This parameter is specified by design and/or characterization and is not tested in production. Figure 1. I2C Timing 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: LDC1612 LDC1614 |
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