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ADUM1100BR Datasheet(PDF) 4 Page - Analog Devices |
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ADUM1100BR Datasheet(HTML) 4 Page - Analog Devices |
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4 / 16 page  REV. E ADuM1100 –4– Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Input Supply Current, Quiescent IDDI(Q) 5 V/3 V Operation 0.3 0.8 mA 3 V/5 V Operation 0.1 0.3 mA Output Supply Current, Quiescent IDDO(Q) 5 V/3 V Operation 0.005 0.04 mA 3 V/5 V Operation 0.01 0.06 mA Input Supply Current, 25 Mbps IDDI(25) 5 V/3 V Operation 2.2 3.5 mA 12.5 MHz Logic Signal Frequency 3 V/5 V Operation 2.0 2.8 mA 12.5 MHz Logic Signal Frequency Output Supply Current, 25 Mbps IDDO(25) 5 V/3 V Operation 0.3 0.7 mA 12.5 MHz Logic Signal Frequency 3 V/5 V Operation 0.5 1.0 mA 12.5 MHz Logic Signal Frequency Input Supply Current, 50 Mbps IDDI(50) 5 V/3 V Operation 4.5 7.0 mA 25 MHz Logic Signal Frequency 3 V/5 V Operation 4.0 6.0 mA 25 MHz Logic Signal Frequency Output Supply Current, 50 Mbps IDDO(50) 5 V/3 V Operation 1.2 1.6 mA 25 MHz Logic Signal Frequency 3 V/5 V Operation 1.0 1.5 mA 25 MHz Logic Signal Frequency Input Currents IIA –10 +0.01 +10 µA0 ≤ V IA, VIB, VIC, VID ≤ V DD1 or VDD2 Logic High Output Voltage, VOH VDD2 – 0.1 3.3 V IO = –20 µA, VI = VIH 5 V/3 V Operation VDD2 – 0.5 3.0 V IO = –2.5 mA, VI = VIH Logic Low Output Voltage, VOL 0.0 0.1 V IO = 20 µA, V I = VIL 5 V/3 V Operation 0.04 0.1 V IO = 400 µA, VI = VIL 0.3 0.4 V IO = 2.5 mA, VI = VIL Logic High Output Voltage, VOH VDD2 – 0.1 5.0 V IO = –20 µA, V I = VIH 3 V/5 V Operation VDD2 – 0.8 4.6 V IO = –4 mA, VI = VIH Logic Low Output Voltage, VOL 0.0 0.1 V IO = 20 µA, VI = VIL 3 V/5 V Operation 0.03 0.1 V IO = 400 µA, V I = VIL 0.3 0.8 V IO = 4 mA, VI = VIL SWITCHING SPECIFICATIONS For ADuM1100AR Minimum Pulse Width 3 PW 40 ns CL = 15 pF, CMOS Signal Levels Maximum Data Rate 4 25 Mbps CL = 15 pF, CMOS Signal Levels For ADuM1100BR/ADuM1100UR Minimum Pulse Width 3 PW 20 ns CL = 15 pF, CMOS Signal Levels Maximum Data Rate 4 50 Mbps CL = 15 pF, CMOS Signal Levels For All Grades Propagation Delay Time to Logic tPHL, tPLH Low/High Output 5, 6 5 V/3 V Operation (See TPC 5) 13 21 ns CL = 15 pF, CMOS Signal Levels 3 V/5 V Operation (See TPC 6) 16 26 ns CL = 15 pF, CMOS Signal Levels Pulse Width Distortion, |tPLH – tPHL| 6 PWD 5 V/3 V Operation 0.5 2 ns CL = 15 pF, CMOS Signal Levels 3 V/5 V Operation 0.5 3 ns CL = 15 pF, CMOS Signal Levels Change versus Temperature 5 V/3 V Operation 3 ps/ºC CL = 15 pF, CMOS Signal Levels 3 V/5 V Operation 10 ps/ºC CL = 15 pF, CMOS Signal Levels Propagation Delay Skew tPSK1 (Equal Temperature) 6, 8 5 V/3 V Operation 12 ns CL = 15 pF, CMOS Signal Levels 3 V/5 V Operation 15 ns CL = 15 pF, CMOS Signal Levels ELECTRICAL SPECIFICATIONS, MIXED 5 V/3 V or 3 V/5 V OPERATION1 (5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All min/max specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25 C, VDD1 = 3.3 V, VDD2 = 5 V or VDD1 = 5 V, VDD2 = 3.3 V.) |
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Similar Description - ADUM1100BR |
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