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AK5365 Datasheet(PDF) 7 Page - Asahi Kasei Microsystems |
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AK5365 Datasheet(HTML) 7 Page - Asahi Kasei Microsystems |
7 / 41 page ASAHI KASEI [AK5365] MS0164-E-01 2002/08 - 7 - ANALOG CHARACTERISTICS (Ta=25 °C; AVDD=5.0V, DVDD=3.3V; AVSS=DVSS=0V; fs=48kHz, 96kHz; BICK=64fs; Signal Frequency=1kHz; 24bit Data; Measurement frequency=20Hz ∼ 20kHz at fs=48kHz, 40Hz ∼ 40kHz at fs=96kHz; unless otherwise specified) Parameter min typ max Units Pre-Amp Characteristics: Feedback Resistance 10 50 k Ω S/(N+D) (Note 4) - 100 dB S/N (A-weighted) - 108 dB Load Resistance (Note 5) 6.3 k Ω Load Capacitance 20 pF Input PGA Characteristics: Input Voltage (Note 6) 0.9 1 1.1 Vrms Input Resistance (Note 7) 6.3 10 15 k Ω Step Size 0.2 0.5 0.8 dB Gain Control Range ALC = OFF ALC = ON 0 −9.5 +12 +12 dB dB ADC Analog Input Characteristics: IPGA=0dB, ALC = OFF (Note 8) Resolution 24 Bits S/(N+D) ( −0.5dBFS) fs=48kHz fs=96kHz 84 82 94 92 dB dB DR ( −60dBFS) fs=48kHz, A-weighted fs=96kHz 96 89 103 99 dB dB S/N fs=48kHz, A-weighted fs=96kHz 96 89 103 99 dB dB Interchannel Isolation (Note 9) 90 110 dB Interchannel Gain Mismatch 0.2 0.5 dB Gain Drift 100 - ppm/ °C Power Supply Rejection (Note 10) 50 - dB Power Supplies Power Supply Current Normal Operation (PDN pin = “H”) AVDD DVDD (fs=48kHz) (fs=96kHz) Power-down mode (PDN pin = “L”) (Note 11) AVDD DVDD 23 4 8 10 10 35 8 16 100 100 mA mA mA µA µA Note 4. This value is measured at LOUT and ROUT pins using the circuit as shown in Figure 24. The input signal voltage is 2Vrms. Note 5. This value is the input impedance of an external device that the LOUT and ROUT pins can drive, when a device is connected with LOUT and ROUT pin externally. The feedback resistor (min. 10k Ω) that it is usually connected with the LOUT/ROUT pins, and the value of input impedance (min. 6.3k Ω) of the IPGAL/R pins are not included. Note 6. Full scale (0dB) of the input voltage at ALC=OFF and IPGA=0dB. Input voltage to IPGAL and IPGAR pins is proportional to AVDD voltage. Vin = 0.2 x AVDD (Vrms). Note 7. This value is input impedance of the IPGAL and IPGAR pins. Note 8. This value is measured via the following path. Pre-Amp → IPGA (Gain : 0dB) → ADC. The measurement circuit is Figure 24. Note 9. This value is the interchannel isolation between all the channels of the LIN1-5 and RIN1-5 when the applied input signal causes the Pre-Amp output to equal IPGA input. Note 10. PSR is applied to AVDD and DVDD with 1kHz, 50mVpp. Note 11. All digital input pins are held DVDD or DVSS. |
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