AS7C256A-20JCN datasheet(1/9 Pages) ALSC

Part #	AS7C256A-20JCN

Description	5V 32K X 8 CMOS SRAM (Common I/O)

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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1 / 9 page

September 2004

AS7C256A

9/24/04; v.1.2

Alliance Semiconductor

P. 1 of 9

5V 32K X 8 CMOS SRAM (Common I/O)

®

Features

• Pin compatible with AS7C256

• Industrial and commercial temperature options

• Organization: 32,768 words × 8 bits

• High speed

- 10/12/15/20 ns address access time

- 5, 6, 7, 8 ns output enable access time

• Very low power consumption: ACTIVE

- 412.5 mW max @ 10 ns

• Very low power consumption: STANDBY

- 11 mW max CMOS I/O

• Easy memory expansion with CE and OE inputs

• TTL-compatible, three-state I/O

• 28-pin JEDEC standard packages

- 300 mil SOJ

-8

× 13.4 mm TSOP 1

• ESD protection

≥ 2000 volts

• Latch-up current

≥ 200 mA

• 2.0V Data retention

Logic block diagram

A

9

A

8

256 X 128 X 8

Array

(262,144)

Input buffer

A0

A1

A2

A3

A4

A5

A6

A7

A

10

A

11

A

12

A

13

A

14

I/O0

I/O7

VCC

GND

OE

CE

WE

Column decoder

Control

circuit

Pin arrangement

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

VCC

WE

A13

A8

A9

A11

OE

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

GND

AS7C256A

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

VCC

WE

A13

A8

A9

A11

OE

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

GND

16

15

28-pin TSOP 1 (8×13.4 mm)

28-pin SOJ (300 mil)

Selection guide

-10

-12

-15

-20

Unit

Maximum address access time

10

12

15

20

ns

Maximum output enable access time

5

6

7

8

ns

Maximum operating current

75

70

65

60

mA

Maximum CMOS standby current

2

mA

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AS7C256A-20JCN Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

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