SN54AS286, SN74AS286

9BIT PARITY GENERATORS/CHECKERS

WITH BUSDRIVER PARITY I/O PORT

SDAS050B − DECEMBER 1983 − REVISED DECEMBER 1994

Copyright

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Nine Data Lines

Generation or Checking by Using the

Parity I/O Port

Small-Outline (D) Packages, Ceramic Chip

Carriers (FK), and Standard Plastic (N) and

Ceramic (J) 300-mil DIPs

description

The SN54AS286 and SN74AS286 universal 9-bit

parity generators/checkers feature a local output

for parity checking and a 48-mA bus-driving

parity

input/output

(I/O)

port

for

parity

generation/checking. The word-length capability

is easily expanded by cascading.

The transmit (XMIT) control input is implemented

specifically to accommodate cascading. When

XMIT is low, the parity tree is disabled and

PARITY ERROR remains at a high logic level

regardless of the input levels. When XMIT is high,

the parity tree is enabled. PARITY ERROR

indicates a parity error when either an even

number of inputs ( A −I ) are high and PARITY I/O

is forced to a low logic level, or when an odd

number of inputs are high and PARITY I/O is

forced to a high logic level.

The I/O control circuitry was designed so that the I/O port remains in the high-impedance state during power up

or power down to prevent bus glitches.

The SN54AS286 is characterized for operation over the full military temperature range of −55

°C to 125°C. The

SN74AS286 is characterized for operation from 0

°C to 70°C.

FUNCTION TABLE

NUMBER OF INPUTS

(A − I) THAT

ARE HIGH

XMIT

PARITY

I/O

PARITY

ERROR

0, 2, 4, 6, 8

l

H

H

1, 3, 5, 7, 9

l

L

H

0, 2, 4, 6, 8

h

h

H

0, 2, 4, 6, 8

h

l

L

1, 3, 5, 7, 9

h

h

L

1, 3, 5, 7, 9

h

l

H

h = high input level

l = low input level

H = high output level

L = low output level

SN54AS286 ...J PACKAGE

SN74AS286 ...D OR N PACKAGE

(TOP VIEW)

SN54AS286 . . . FK PACKAGE

(TOP VIEW)

32

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

E

NC

D

NC

C

XMIT

NC

I

NC

PARITY ERROR

NC − No internal connection

1

2

3

4

5

6

7

14

13

12

11

10

9

8

G

H

XMIT

I

PARITY ERROR

PARITY I/O

GND

F

E

D

C

B

A

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.