BCM4318EKFBG datasheet(11/54 Pages) CYPRESS

Part #	BCM4318EKFBG

Description	AirForce One??Chip 802.11g MAC/Baseband/Radio

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Manufacturer	CYPRESS [Cypress Semiconductor]

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11 / 54 page

Preliminary Data Sheet

BCM4318/BCM4318E

11/09/04

Broadcom Corporation

Document 4318_4318E-DS01-405-R

Section 1:Functional Description

Page 3

Figure 2: IEEE 802.11a/g MAC Block Diagram

The host interface consists of registers for controlling and monitoring the status of the MAC core and interfacing with the

TX/RX FIFOs. There are four transmit FIFOs: asynchronous, priority, Broadcast/Multicast (BC/MC) and ATIM. Each transmit

FIFO is 3-KB deep. In addition to the transmit FIFOs, there is a 1-KB template area for response frames. Whenever the host

has a frame to transmit, the host queues the frame into one of the transmit FIFOs with a TX descriptor containing TX control

information. The PSM schedules the transmission on the medium depending on the frame type, transmission rules in IEEE

802.11 protocol, and the current medium occupancy scenario. After the transmission is completed and an ACK is received,

a TX status is returned to the host confirming the same in the TX status FIFO.

The MAC contains a single 4.5-KB RX FIFO. Whenever a frame is received, the frame is sent to the host along with an RX

descriptor that contains additional information about the frame reception conditions.

The Power Management block maintains the information regarding the power management state of the core (and the

associated STAs in case of an AP) to help in dynamic decisions by the core regarding frame transmission.

The WEP block performs the required WEP operation on the TX/RX frames. The WEP block supports separate transmit and

receive keys with four shared keys and 50 link-specific keys. The link-specific keys are used to establish a secure link

between any two STAs, with the required key being shared between only those two STAs, hence excluding all the other

STAs in the same network from deciphering the communication between those two STAs. The WEP block supports the

following encryption schemes that can be selected on a per-destination basis:

•

None: the WEP block acts as a pass-through

•

WEP: 40-bit secure key and 24-bit IV as defined in IEEE Std 802.11-1999

Host Interface (Host Registers)

N TX FIFOs

Template

1 RX FIFO

WEP / AES Encryption

Power

Management

Programmable

State Machine

(PSM)

Data

Memory

Code

Memory

Timing and

Control

PHY Interface

TX Status

FIFO

TX Engine

RX Engine

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