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MC9S12DJ256B Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MC9S12DJ256B Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 126 page  Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. DOCUMENT NUMBER 9S12DP256BDGV2/D 2 Revision History Version Number Revision Date Effective Date Author Description of Changes V01.00 29 MAR 2001 29 MAR 2001 Initial version. V01.01 8 MAY 2001 8 MAY 2001 VDD5 spec change 4.5V . . 5.25V Current Injection on single pin +- 2.5mA added DC bias level on EXTAL pin minor cosmetics and corrected typos V02.00 16 May 2001 16 May 2001 changed ATD Electrical Characteristics seperate coupling ratio for positive and negative bulk current injection added pinout for 80QFP corrected SPI timing V02.01 5 June 2001 corrected Expanded Bus Timing Characteristics V02.02 14 June 2001 Some corrections on pin usage after review V02.03 18 June 2001 Minor corrections with respect to format and wording Added SRAM data retention disclaimer V02.04 26 June 2001 Changed Oscillator Characteristics tCQOUT max 2.5s and replaced Clock Monitor Time-out by Clock Monitor Failure Assert Frequency Changed Self Clock Mode Frequency min 1MHz and max 5.5MHz Changed IDDPS (RTI and COP disabled) to 400uA V02.05 11 July 2001 Corrected fref and REFDV/SYNR Settings for PLL Stabilization Delay Measurements, added tEXTR and tEXTF to Oscillator Characteristics, Corrected tEXTL and tEXTH values V02.06 17 July 2001 Added thermal resistance for LQFP 80, added PCB layout proposal for power and ground connections V02.07 24 July 2001 Added Document Names Variable definitions and Names have been hidden Added Maskset 1K79X Modified description in chapter A.5.2 Oscillator Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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