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LM3200 Datasheet(PDF) 4 Page - Texas Instruments |
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LM3200 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 24 page  LM3200 SNVS319C – NOVEMBER 2004 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (1) (2) Limits in standard typeface are for TA = TJ = 25°C. Limits in boldface type apply over the full operating ambient temperature range ( −25°C ≤ TA = TJ ≤ +85°C). Unless otherwise noted, specifications apply to the LM3200 with: PVIN = VDD = EN = 3.6V, BYP = 0V. Symbol Parameter Conditions Min Typ Max Units VIN Input Voltage Range (3) PVIN = VDD = VIN 2.7 5.5 V VFB, MIN Feedback Voltage at VCON = 0.267V, VIN = 3.6V 0.75 0.800 0.85 V Minimum Setting VFB, MAX Feedback Voltage at VCON = 1.20V, VIN = 4.2V 3.528 3.600 3.672 V Maximum Setting OVP Over-Voltage Protection (4) 330 400 mV Threshold VBYPASS− Auto Bypass Detection (5) 160 250 320 mV Negative Threshold VBYPASS+ Auto Bypass Detection (5) 350 450 540 mV Positive Threshold ISHDN Shutdown Supply EN = SW = BYPOUT = VCON = FB = 0V 0.1 3 µA Current (6) IQ_PWM DC Bias Current into VCON = 0.267V, FB = 2V, No-Load 720 850 µA VDD IQ_BYP BYP = 3.6V, VCON = 0V, No-Load 720 850 µA RDSON (P) Pin-Pin Resistance for ISW = 500mA 320 450 m Ω PFET RDSON (N) Pin-Pin Resistance for ISW = - 200mA 310 450 m Ω N-FET RDSON Pin-Pin Resistance for IBYPOUT = 500mA 85 120 m Ω (BYP) Bypass FET ILIM-PFET Switch Current Limit (7) 700 820 940 mA ILIM-BYP Bypass FET Current (8) 800 1000 1200 mA Limit FOSC Internal Oscillator 1.7 2 2.2 MHz Frequency VIH Logic High Input 1.20 V Threshold for EN, BYP VIL Logic Low Input 0.4 V Threshold for EN, BYP IPIN Pin Pull Down Current EN, BYP = 3.6V 5 10 µA for EN, BYP Gain VCON to VOUT Gain 3 V/V ICON VCON Input Leakage VCON = 1.2V 10 nA Current (1) All voltages are with respect to the potential at the GND pins. (2) Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely norm. (3) The LM3200 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. (4) Over-Voltage protection (OVP) threshold is the voltage above the nominal VOUT where the OVP comparator turns off the PFET switch while in PWM mode. (5) VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VBYPASS− for longer than TBYP the Bypass FET turns on and the switching FETs turn off. This is called the Bypass mode. Bypass mode is exited when VIN–VOUT exceeds VBYPASS + for longer than TBYP, and PWM mode returns. The hysterisis for the bypass detection threshold VBYPASS + – V BYPASS− will always be positive and will be approximately 200 mV(typ.). (6) Shutdown current includes leakage current of PFET and Bypass FET. (7) Electrical Characteristics table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Refer to Typical Performance Characteristics (Open/Closed Loop Current Limit vs Temperature curve) for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. (8) Bypass FET current limit is defined as the load current at which the FB voltage is 1V lower than VIN. 4 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM3200 |
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